Searched refs:WB_0 (Results 1 – 6 of 6) sorted by relevance
| /drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_encoder_phys_wb.c | 48 ot_params.num = hw_wb->idx - WB_0; in dpu_encoder_phys_wb_set_ot_limit()
86 qos_params.num = hw_wb->idx - WB_0; in dpu_encoder_phys_wb_set_qos_remap()
307 DPU_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0); in _dpu_encoder_phys_wb_update_flush()
310 DPU_DEBUG("[wb:%d] no ctl assigned\n", hw_wb->idx - WB_0); in _dpu_encoder_phys_wb_update_flush()
326 hw_wb->idx - WB_0); in _dpu_encoder_phys_wb_update_flush()
341 hw_wb->idx - WB_0, mode.name, in dpu_encoder_phys_wb_setup()
365 DPU_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0); in _dpu_encoder_phys_wb_frame_done_helper()
486 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_prepare_for_kickoff()
510 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_needs_single_flush()
521 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_handle_post_kickoff()
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| D | dpu_rm.h | 30 struct dpu_hw_wb *hw_wb[WB_MAX - WB_0];
108 return rm->hw_wb[wb_idx - WB_0]; in dpu_rm_get_wb()
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| D | dpu_hw_ctl.c | 258 case WB_0: in dpu_hw_ctl_update_pending_flush_wb()
271 ctx->pending_wb_flush_mask |= BIT(wb - WB_0); in dpu_hw_ctl_update_pending_flush_wb_v1()
543 wb_active |= BIT(cfg->wb - WB_0); in dpu_hw_ctl_intf_cfg_v1()
624 wb_active &= ~BIT(cfg->wb - WB_0); in dpu_hw_ctl_reset_intf_cfg_v1()
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| D | dpu_hw_mdss.h | 250 WB_0 = 1, enumerator
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| D | dpu_rm.c | 197 if (wb->id < WB_0 || wb->id >= WB_MAX) { in dpu_rm_init()
208 rm->hw_wb[wb->id - WB_0] = hw; in dpu_rm_init()
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| D | dpu_encoder.c | 343 phys_enc->intf_idx - INTF_0, phys_enc->wb_idx - WB_0, in dpu_encoder_helper_report_irq_timeout()
2113 phys->intf_idx - INTF_0, phys->wb_idx - WB_0, in _dpu_encoder_status_show()
2350 if (phys->wb_idx >= WB_0 && phys->wb_idx < WB_MAX) in dpu_encoder_setup_display()
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