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/drivers/gpu/drm/msm/adreno/
Da6xx_gpu_state.h172 #define HLSQ_DBG_REGS(_base, _type, _array) \ argument
173 { .val0 = _base, .val1 = _type, .registers = _array, \
174 .count = ARRAY_SIZE(_array), }
279 #define REGS(_array, _sel_reg, _sel_val) \ argument
280 { .registers = _array, .count = ARRAY_SIZE(_array), \