/drivers/net/ethernet/marvell/octeontx2/af/ |
D | rvu_reg.h | 26 #define RVU_AF_AFPFX_MBOXX(a, b) (0x2000 | (a) << 4 | (b) << 3) argument 44 #define RVU_AF_PFX_BAR4_ADDR(a) (0x5000 | (a) << 4) argument 45 #define RVU_AF_PFX_BAR4_CFG (0x5200 | (a) << 4) 46 #define RVU_AF_PFX_VF_BAR4_ADDR (0x5400 | (a) << 4) 47 #define RVU_AF_PFX_VF_BAR4_CFG (0x5600 | (a) << 4) 48 #define RVU_AF_PFX_LMTLINE_ADDR (0x5800 | (a) << 4) 60 #define RVU_PRIV_PFX_CFG(a) (0x8000100 | (a) << 16) argument 61 #define RVU_PRIV_PFX_MSIX_CFG(a) (0x8000110 | (a) << 16) argument 62 #define RVU_PRIV_PFX_ID_CFG(a) (0x8000120 | (a) << 16) argument 63 #define RVU_PRIV_PFX_INT_CFG(a) (0x8000200 | (a) << 16) argument [all …]
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D | mcs_reg.h | 14 #define MCSX_MCS_TOP_SLAVE_PORT_RESET(a) ({ \ argument 20 offset += (a) * 0x8ull; \ 24 #define MCSX_MCS_TOP_SLAVE_CHANNEL_CFG(a) ({ \ argument 30 offset += (a) * 0x8ull; \ 41 #define MCSX_MIL_RX_LMACX_CFG(a) ({ \ argument 47 offset += (a) * 0x800ull; \ 58 #define MCSX_LINK_LMACX_CFG(a) ({ \ argument 64 offset += (a) * 0x800ull; \ 84 #define MCSX_PAB_RX_SLAVE_PORT_CFGX(a) ({ \ argument 90 offset += (a) * 0x40ull; \ [all …]
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/drivers/scsi/esas2r/ |
D | esas2r_init.c | 46 static bool esas2r_initmem_alloc(struct esas2r_adapter *a, in esas2r_initmem_alloc() argument 53 mem_desc->esas2r_data = dma_alloc_coherent(&a->pcid->dev, in esas2r_initmem_alloc() 75 static void esas2r_initmem_free(struct esas2r_adapter *a, in esas2r_initmem_free() argument 92 dma_free_coherent(&a->pcid->dev, in esas2r_initmem_free() 103 static bool alloc_vda_req(struct esas2r_adapter *a, in alloc_vda_req() argument 117 if (!esas2r_initmem_alloc(a, memdesc, 256)) { in alloc_vda_req() 123 a->num_vrqs++; in alloc_vda_req() 124 list_add(&memdesc->next_desc, &a->vrq_mds_head); in alloc_vda_req() 128 rq->vrq->scsi.handle = a->num_vrqs; in alloc_vda_req() 133 static void esas2r_unmap_regions(struct esas2r_adapter *a) in esas2r_unmap_regions() argument [all …]
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D | esas2r_int.c | 48 static void esas2r_doorbell_interrupt(struct esas2r_adapter *a, u32 doorbell); 49 static void esas2r_get_outbound_responses(struct esas2r_adapter *a); 50 static void esas2r_process_bus_reset(struct esas2r_adapter *a); 56 void esas2r_polled_interrupt(struct esas2r_adapter *a) in esas2r_polled_interrupt() argument 61 esas2r_disable_chip_interrupts(a); in esas2r_polled_interrupt() 63 intstat = esas2r_read_register_dword(a, MU_INT_STATUS_OUT); in esas2r_polled_interrupt() 68 esas2r_write_register_dword(a, MU_OUT_LIST_INT_STAT, in esas2r_polled_interrupt() 70 esas2r_flush_register_dword(a, MU_OUT_LIST_INT_STAT); in esas2r_polled_interrupt() 72 esas2r_get_outbound_responses(a); in esas2r_polled_interrupt() 76 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); in esas2r_polled_interrupt() [all …]
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D | esas2r_disc.c | 48 static void esas2r_disc_abort(struct esas2r_adapter *a, 50 static bool esas2r_disc_continue(struct esas2r_adapter *a, 52 static void esas2r_disc_fix_curr_requests(struct esas2r_adapter *a); 54 static bool esas2r_disc_start_request(struct esas2r_adapter *a, 58 static bool esas2r_disc_block_dev_scan(struct esas2r_adapter *a, 60 static void esas2r_disc_block_dev_scan_cb(struct esas2r_adapter *a, 62 static bool esas2r_disc_dev_add(struct esas2r_adapter *a, 64 static bool esas2r_disc_dev_remove(struct esas2r_adapter *a, 66 static bool esas2r_disc_part_info(struct esas2r_adapter *a, 68 static void esas2r_disc_part_info_cb(struct esas2r_adapter *a, [all …]
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D | esas2r_ioctl.c | 68 struct esas2r_adapter *a; member 82 static void complete_fm_api_req(struct esas2r_adapter *a, in complete_fm_api_req() argument 85 a->fm_api_command_done = 1; in complete_fm_api_req() 86 wake_up_interruptible(&a->fm_api_waiter); in complete_fm_api_req() 92 struct esas2r_adapter *a = (struct esas2r_adapter *)sgc->adapter; in get_physaddr_fm_api() local 93 int offset = sgc->cur_offset - a->save_offset; in get_physaddr_fm_api() 95 (*addr) = a->firmware.phys + offset; in get_physaddr_fm_api() 96 return a->firmware.orig_len - offset; in get_physaddr_fm_api() 101 struct esas2r_adapter *a = (struct esas2r_adapter *)sgc->adapter; in get_physaddr_fm_api_header() local 102 int offset = sgc->cur_offset - a->save_offset; in get_physaddr_fm_api_header() [all …]
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D | esas2r.h | 141 #define esas2r_read_register_dword(a, reg) \ argument 142 readl((void __iomem *)a->regs + (reg) + MW_REG_OFFSET_HWREG) 144 #define esas2r_write_register_dword(a, reg, data) \ argument 145 writel(data, (void __iomem *)(a->regs + (reg) + MW_REG_OFFSET_HWREG)) 147 #define esas2r_flush_register_dword(a, r) esas2r_read_register_dword(a, r) argument 153 #define esas2r_read_data_byte(a, reg) \ argument 154 readb((void __iomem *)a->data_window + (reg)) 405 typedef void (*RQCALLBK) (struct esas2r_adapter *a, 407 typedef bool (*RQBUILDSGL) (struct esas2r_adapter *a, 776 struct esas2r_adapter *a; member [all …]
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D | esas2r_io.c | 46 void esas2r_start_request(struct esas2r_adapter *a, struct esas2r_request *rq) in esas2r_start_request() argument 52 if (unlikely(test_bit(AF_DEGRADED_MODE, &a->flags) || in esas2r_start_request() 53 test_bit(AF_POWER_DOWN, &a->flags))) { in esas2r_start_request() 59 t = a->targetdb + rq->target_id; in esas2r_start_request() 61 if (unlikely(t >= a->targetdb_end in esas2r_start_request() 74 !test_bit(AF_DISC_PENDING, &a->flags))) in esas2r_start_request() 80 esas2r_complete_request(a, rq); in esas2r_start_request() 92 spin_lock_irqsave(&a->queue_lock, flags); in esas2r_start_request() 94 if (likely(list_empty(&a->defer_list) && in esas2r_start_request() 95 !test_bit(AF_CHPRST_PENDING, &a->flags) && in esas2r_start_request() [all …]
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D | esas2r_targdb.c | 46 void esas2r_targ_db_initialize(struct esas2r_adapter *a) in esas2r_targ_db_initialize() argument 50 for (t = a->targetdb; t < a->targetdb_end; t++) { in esas2r_targ_db_initialize() 59 void esas2r_targ_db_remove_all(struct esas2r_adapter *a, bool notify) in esas2r_targ_db_remove_all() argument 64 for (t = a->targetdb; t < a->targetdb_end; t++) { in esas2r_targ_db_remove_all() 68 spin_lock_irqsave(&a->mem_lock, flags); in esas2r_targ_db_remove_all() 69 esas2r_targ_db_remove(a, t); in esas2r_targ_db_remove_all() 70 spin_unlock_irqrestore(&a->mem_lock, flags); in esas2r_targ_db_remove_all() 74 a)); in esas2r_targ_db_remove_all() 75 esas2r_target_state_changed(a, esas2r_targ_get_id(t, in esas2r_targ_db_remove_all() 76 a), in esas2r_targ_db_remove_all() [all …]
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D | esas2r_main.c | 72 struct esas2r_adapter *a = esas2r_adapter_from_kobj(kobj); in read_fw() local 74 return esas2r_read_fw(a, buf, off, count); in read_fw() 81 struct esas2r_adapter *a = esas2r_adapter_from_kobj(kobj); in write_fw() local 83 return esas2r_write_fw(a, buf, off, count); in write_fw() 90 struct esas2r_adapter *a = esas2r_adapter_from_kobj(kobj); in read_fs() local 92 return esas2r_read_fs(a, buf, off, count); in read_fs() 99 struct esas2r_adapter *a = esas2r_adapter_from_kobj(kobj); in write_fs() local 103 result = esas2r_write_fs(a, buf, off, count); in write_fs() 115 struct esas2r_adapter *a = esas2r_adapter_from_kobj(kobj); in read_vda() local 117 return esas2r_read_vda(a, buf, off, count); in read_vda() [all …]
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D | esas2r_flash.c | 133 static void esas2r_fmapi_callback(struct esas2r_adapter *a, in esas2r_fmapi_callback() argument 169 (*fc->interrupt_cb)(a, rq); in esas2r_fmapi_callback() 176 static void build_flash_msg(struct esas2r_adapter *a, in build_flash_msg() argument 194 esas2r_build_flash_req(a, in build_flash_msg() 201 esas2r_rq_free_sg_lists(rq, a); in build_flash_msg() 212 esas2r_sgc_init(sgc, a, rq, &rq->vrq->flash.data.sge[0]); in build_flash_msg() 214 if (!esas2r_build_sg_list(a, rq, sgc)) { in build_flash_msg() 227 static bool load_image(struct esas2r_adapter *a, struct esas2r_request *rq) in load_image() argument 234 if (test_bit(AF_DEGRADED_MODE, &a->flags)) in load_image() 237 build_flash_msg(a, rq); in load_image() [all …]
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/drivers/net/ethernet/marvell/octeontx2/nic/ |
D | otx2_reg.h | 16 #define RVU_PF_VFX_PFVF_MBOXX(a, b) (0x0 | (a) << 12 | (b) << 3) argument 18 #define RVU_PF_BLOCK_ADDRX_DISC(a) (0x200 | (a) << 3) argument 19 #define RVU_PF_VFME_STATUSX(a) (0x800 | (a) << 3) argument 20 #define RVU_PF_VFTRPENDX(a) (0x820 | (a) << 3) argument 21 #define RVU_PF_VFTRPEND_W1SX(a) (0x840 | (a) << 3) argument 22 #define RVU_PF_VFPF_MBOX_INTX(a) (0x880 | (a) << 3) argument 23 #define RVU_PF_VFPF_MBOX_INT_W1SX(a) (0x8A0 | (a) << 3) argument 24 #define RVU_PF_VFPF_MBOX_INT_ENA_W1SX(a) (0x8C0 | (a) << 3) argument 25 #define RVU_PF_VFPF_MBOX_INT_ENA_W1CX(a) (0x8E0 | (a) << 3) argument 26 #define RVU_PF_VFFLR_INTX(a) (0x900 | (a) << 3) argument [all …]
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/drivers/crypto/cavium/cpt/ |
D | cpt_common.h | 39 #define CPTX_PF_CONSTANTS(a) (0x0ll + ((u64)(a) << 36)) argument 40 #define CPTX_PF_RESET(a) (0x100ll + ((u64)(a) << 36)) argument 41 #define CPTX_PF_DIAG(a) (0x120ll + ((u64)(a) << 36)) argument 42 #define CPTX_PF_BIST_STATUS(a) (0x160ll + ((u64)(a) << 36)) argument 43 #define CPTX_PF_ECC0_CTL(a) (0x200ll + ((u64)(a) << 36)) argument 44 #define CPTX_PF_ECC0_FLIP(a) (0x210ll + ((u64)(a) << 36)) argument 45 #define CPTX_PF_ECC0_INT(a) (0x220ll + ((u64)(a) << 36)) argument 46 #define CPTX_PF_ECC0_INT_W1S(a) (0x230ll + ((u64)(a) << 36)) argument 47 #define CPTX_PF_ECC0_ENA_W1S(a) (0x240ll + ((u64)(a) << 36)) argument 48 #define CPTX_PF_ECC0_ENA_W1C(a) (0x250ll + ((u64)(a) << 36)) argument [all …]
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/drivers/acpi/acpica/ |
D | acmacros.h | 169 #define ACPI_DIV_2(a) _ACPI_DIV(a, 1) argument 170 #define ACPI_MUL_2(a) _ACPI_MUL(a, 1) argument 171 #define ACPI_MOD_2(a) _ACPI_MOD(a, 2) argument 173 #define ACPI_DIV_4(a) _ACPI_DIV(a, 2) argument 174 #define ACPI_MUL_4(a) _ACPI_MUL(a, 2) argument 175 #define ACPI_MOD_4(a) _ACPI_MOD(a, 4) argument 177 #define ACPI_DIV_8(a) _ACPI_DIV(a, 3) argument 178 #define ACPI_MUL_8(a) _ACPI_MUL(a, 3) argument 179 #define ACPI_MOD_8(a) _ACPI_MOD(a, 8) argument 181 #define ACPI_DIV_16(a) _ACPI_DIV(a, 4) argument [all …]
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/drivers/net/wireless/intel/iwlwifi/ |
D | iwl-debug.h | 43 #define __IWL_ERR_DEV(d, mode, f, a...) \ argument 46 __iwl_err((d), mode, f, ## a); \ 48 #define IWL_ERR_DEV(d, f, a...) \ argument 49 __IWL_ERR_DEV(d, IWL_ERR_MODE_REGULAR, f, ## a) 50 #define IWL_ERR(m, f, a...) \ argument 51 IWL_ERR_DEV((m)->dev, f, ## a) 52 #define IWL_ERR_LIMIT(m, f, a...) \ argument 53 __IWL_ERR_DEV((m)->dev, IWL_ERR_MODE_RATELIMIT, f, ## a) 54 #define IWL_WARN(m, f, a...) \ argument 57 __iwl_warn((m)->dev, f, ## a); \ [all …]
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/drivers/staging/media/atomisp/pci/hive_isp_css_include/ |
D | math_support.h | 21 #define IS_ODD(a) ((a) & 0x1) argument 22 #define IS_EVEN(a) (!IS_ODD(a)) argument 32 #define IMPLIES(a, b) (!(a) || (b)) argument 36 #define MAX(a, b) (((a) > (b)) ? (a) : (b)) argument 37 #define MIN(a, b) (((a) < (b)) ? (a) : (b)) argument 39 #define ROUND_DIV(a, b) (((b) != 0) ? ((a) + ((b) >> 1)) / (b) : 0) argument 40 #define CEIL_DIV(a, b) (((b) != 0) ? ((a) + (b) - 1) / (b) : 0) argument 41 #define CEIL_MUL(a, b) (CEIL_DIV(a, b) * (b)) argument 42 #define CEIL_MUL2(a, b) (((a) + (b) - 1) & ~((b) - 1)) argument 43 #define CEIL_SHIFT(a, b) (((a) + (1 << (b)) - 1) >> (b)) argument [all …]
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/drivers/gpu/drm/nouveau/include/nvhw/class/ |
D | cl907d.h | 72 #define NV907D_DAC_SET_CONTROL(a) (0x00000180 + (a)*0… argument 83 #define NV907D_SOR_SET_CONTROL(a) (0x00000200 + (a)*0… argument 106 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00000404 + (a)*0… argument 128 #define NV907D_HEAD_SET_CONTROL(a) (0x00000408 + (a)*0… argument 132 #define NV907D_HEAD_SET_OVERSCAN_COLOR(a) (0x00000410 + (a)*0… argument 136 #define NV907D_HEAD_SET_RASTER_SIZE(a) (0x00000414 + (a)*0… argument 139 #define NV907D_HEAD_SET_RASTER_SYNC_END(a) (0x00000418 + (a)*0… argument 142 #define NV907D_HEAD_SET_RASTER_BLANK_END(a) (0x0000041C + (a)*0… argument 145 #define NV907D_HEAD_SET_RASTER_BLANK_START(a) (0x00000420 + (a)*0… argument 148 #define NV907D_HEAD_SET_RASTER_VERT_BLANK2(a) (0x00000424 + (a)*0… argument [all …]
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D | cl507d.h | 88 #define NV507D_DAC_SET_CONTROL(a) (0x00000400 + (a)*0… argument 122 #define NV507D_DAC_SET_POLARITY(a) (0x00000404 + (a)*0… argument 131 #define NV507D_SOR_SET_CONTROL(a) (0x00000600 + (a)*0… argument 160 #define NV507D_PIOR_SET_CONTROL(a) (0x00000700 + (a)*0… argument 183 #define NV507D_HEAD_SET_PIXEL_CLOCK(a) (0x00000804 + (a)*0… argument 195 #define NV507D_HEAD_SET_CONTROL(a) (0x00000808 + (a)*0… argument 199 #define NV507D_HEAD_SET_OVERSCAN_COLOR(a) (0x00000810 + (a)*0… argument 203 #define NV507D_HEAD_SET_RASTER_SIZE(a) (0x00000814 + (a)*0… argument 206 #define NV507D_HEAD_SET_RASTER_SYNC_END(a) (0x00000818 + (a)*0… argument 209 #define NV507D_HEAD_SET_RASTER_BLANK_END(a) (0x0000081C + (a)*0… argument [all …]
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D | cl827d.h | 28 #define NV827D_HEAD_SET_BASE_LUT_LO(a) (0x00000840 + (a)*0… argument 36 #define NV827D_HEAD_SET_BASE_LUT_HI(a) (0x00000844 + (a)*0… argument 38 #define NV827D_HEAD_SET_CONTEXT_DMA_LUT(a) (0x0000085C + (a)*0… argument 40 #define NV827D_HEAD_SET_OFFSET(a,b) (0x00000860 + (a)*0… argument 42 #define NV827D_HEAD_SET_SIZE(a) (0x00000868 + (a)*0… argument 45 #define NV827D_HEAD_SET_STORAGE(a) (0x0000086C + (a)*0… argument 57 #define NV827D_HEAD_SET_PARAMS(a) (0x00000870 + (a)*0… argument 76 #define NV827D_HEAD_SET_CONTEXT_DMAS_ISO(a,b) (0x00000874 + (a)*0… argument 78 #define NV827D_HEAD_SET_CONTROL_CURSOR(a) (0x00000880 + (a)*0… argument 99 #define NV827D_HEAD_SET_OFFSET_CURSOR(a) (0x00000884 + (a)*0… argument [all …]
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D | clc57d.h | 30 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0… argument 82 #define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0… argument 134 #define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0… argument 149 #define NVC57D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0… argument 161 #define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0… argument 220 #define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0… argument 225 #define NVC57D_HEAD_SET_PIXEL_CLOCK_CONFIGURATION(a) (0x0000201C + (a)*0… argument 235 #define NVC57D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0… argument 240 #define NVC57D_HEAD_SET_HEAD_USAGE_BOUNDS(a) (0x00002030 + (a)*0… argument 256 #define NVC57D_HEAD_SET_RASTER_SIZE(a) (0x00002064 + (a)*0… argument [all …]
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D | clc37d.h | 204 #define NVC37D_SOR_SET_CONTROL(a) (0x00000300 + (a)*0… argument 232 #define NVC37D_WINDOW_SET_CONTROL(a) (0x00001000 + (a)*0… argument 245 #define NVC37D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0… argument 297 #define NVC37D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0… argument 349 #define NVC37D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0… argument 362 #define NVC37D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0… argument 383 #define NVC37D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0… argument 408 #define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY(a) (0x0000200C + (a)*0… argument 413 #define NVC37D_HEAD_SET_DITHER_CONTROL(a) (0x00002018 + (a)*0… argument 432 #define NVC37D_HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(a) (0x00002028 + (a)*0… argument [all …]
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/drivers/target/iscsi/ |
D | iscsi_target_nodeattrib.c | 31 struct iscsi_node_attrib *a = &acl->node_attrib; in iscsit_set_default_node_attribues() local 33 a->authentication = NA_AUTHENTICATION_INHERITED; in iscsit_set_default_node_attribues() 34 a->dataout_timeout = NA_DATAOUT_TIMEOUT; in iscsit_set_default_node_attribues() 35 a->dataout_timeout_retries = NA_DATAOUT_TIMEOUT_RETRIES; in iscsit_set_default_node_attribues() 36 a->nopin_timeout = NA_NOPIN_TIMEOUT; in iscsit_set_default_node_attribues() 37 a->nopin_response_timeout = NA_NOPIN_RESPONSE_TIMEOUT; in iscsit_set_default_node_attribues() 38 a->random_datain_pdu_offsets = NA_RANDOM_DATAIN_PDU_OFFSETS; in iscsit_set_default_node_attribues() 39 a->random_datain_seq_offsets = NA_RANDOM_DATAIN_SEQ_OFFSETS; in iscsit_set_default_node_attribues() 40 a->random_r2t_offsets = NA_RANDOM_R2T_OFFSETS; in iscsit_set_default_node_attribues() 41 a->default_erl = tpg->tpg_attrib.default_erl; in iscsit_set_default_node_attribues() [all …]
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/drivers/gpu/drm/amd/display/dc/dml/ |
D | dml_inline_defs.h | 32 static inline double dml_min(double a, double b) in dml_min() argument 34 return (double) dcn_bw_min2(a, b); in dml_min() 37 static inline double dml_min3(double a, double b, double c) in dml_min3() argument 39 return dml_min(dml_min(a, b), c); in dml_min3() 42 static inline double dml_min4(double a, double b, double c, double d) in dml_min4() argument 44 return dml_min(dml_min(a, b), dml_min(c, d)); in dml_min4() 47 static inline double dml_max(double a, double b) in dml_max() argument 49 return (double) dcn_bw_max2(a, b); in dml_max() 52 static inline double dml_max3(double a, double b, double c) in dml_max3() argument 54 return dml_max(dml_max(a, b), c); in dml_max3() [all …]
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/drivers/net/ethernet/smsc/ |
D | smc91x.h | 32 #define SMC_outw_b(x, a, r) \ argument 36 SMC_outb(__val16, a, __reg); \ 37 SMC_outb(__val16 >> 8, a, __reg + (1 << SMC_IO_SHIFT)); \ 40 #define SMC_inw_b(a, r) \ argument 44 __val16 = SMC_inb(a, __reg); \ 45 __val16 |= SMC_inb(a, __reg + (1 << SMC_IO_SHIFT)) << 8; \ 67 #define SMC_inb(a, r) readb((a) + (r)) argument 68 #define SMC_inw(a, r) \ argument 71 SMC_16BIT(lp) ? readw((a) + __smc_r) : \ 72 SMC_8BIT(lp) ? SMC_inw_b(a, __smc_r) : \ [all …]
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/drivers/net/ethernet/intel/e1000/ |
D | e1000_osdep.h | 36 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \ argument 37 writel((value), ((a)->hw_addr + \ 38 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ 41 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \ argument 42 readl((a)->hw_addr + \ 43 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ 49 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \ argument 50 writew((value), ((a)->hw_addr + \ 51 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ 54 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \ argument [all …]
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