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/drivers/xen/
Dgntdev.c132 struct gntdev_grant_map *add; in gntdev_alloc_map() local
135 add = kzalloc(sizeof(*add), GFP_KERNEL); in gntdev_alloc_map()
136 if (NULL == add) in gntdev_alloc_map()
139 add->grants = kvmalloc_array(count, sizeof(add->grants[0]), in gntdev_alloc_map()
141 add->map_ops = kvmalloc_array(count, sizeof(add->map_ops[0]), in gntdev_alloc_map()
143 add->unmap_ops = kvmalloc_array(count, sizeof(add->unmap_ops[0]), in gntdev_alloc_map()
145 add->pages = kvcalloc(count, sizeof(add->pages[0]), GFP_KERNEL); in gntdev_alloc_map()
146 add->being_removed = in gntdev_alloc_map()
147 kvcalloc(count, sizeof(add->being_removed[0]), GFP_KERNEL); in gntdev_alloc_map()
148 if (NULL == add->grants || in gntdev_alloc_map()
[all …]
Dpci.c48 struct physdev_pci_device_add add; in xen_add_device() member
51 .add.seg = pci_domain_nr(pci_dev->bus), in xen_add_device()
52 .add.bus = pci_dev->bus->number, in xen_add_device()
53 .add.devfn = pci_dev->devfn in xen_add_device()
55 struct physdev_pci_device_add *add = &add_ext.add; in xen_add_device() local
63 add->flags = XEN_PCI_DEV_VIRTFN; in xen_add_device()
64 add->physfn.bus = physfn->bus->number; in xen_add_device()
65 add->physfn.devfn = physfn->devfn; in xen_add_device()
69 add->flags = XEN_PCI_DEV_EXTFN; in xen_add_device()
98 add->optarr[0] = pxm; in xen_add_device()
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
Dcom.fuc195 add b32 $r4 0x30
205 add b32 $r5 2
273 add b32 $r8 $r6 0x180
300 add b32 $r5 4
303 add b32 $r7 $r6
308 add b32 $r5 $r7
315 add b32 $r4 $r5
410 add b32 $r4 0x600
420 add $sp -0x10
429 add b32 $r5 1
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
Dgpc.fuc177 add b32 $r3 1
179 add b32 $r2 1
180 add b32 $r14 4
202 add b32 $r2 $r15
203 add b32 $r3 $r15
211 add b32 $r2 $r14
212 add b32 $r3 $r14
221 add b32 $r2 $r14
222 add b32 $r3 $r14
230 add b32 $r2 1
[all …]
Dcom.fuc27 // queue_put - add request to queue
48 add b32 $r8 $r13
49 add b32 $r8 8
54 add b32 $r9 1
76 add b32 $r9 $r13
77 add b32 $r9 8
82 add b32 $r8 1
163 add b32 $r8 1
165 add b32 $r9 $r8
166 add b32 $r14 4
[all …]
Dhub.fuc154 add b32 $r3 0x1300
155 add b32 $r1 $r15
161 add b32 $r1 1
165 add b32 $r1 $r15
179 add b32 $r14 $r4 0x804
182 add b32 $r14 $r4 0x10c
185 add b32 $r14 $r4 0x104
187 add b32 $r14 $r4 0x100
192 add b32 $r14 $r4 0x800
197 add b32 $r14 $r4 0x804
[all …]
/drivers/mtd/lpddr/
Dlpddr2_nvm.c237 u_long add, end_add; in lpddr2_nvm_do_block_op() local
244 add = start_add; in lpddr2_nvm_do_block_op()
245 end_add = add + len; in lpddr2_nvm_do_block_op()
248 ret = lpddr2_nvm_do_op(map, block_op, 0x00, add, add, NULL); in lpddr2_nvm_do_block_op()
251 add += mtd->erasesize; in lpddr2_nvm_do_block_op()
252 } while (add < end_add); in lpddr2_nvm_do_block_op()
321 u_long add, current_len, tot_len, target_len, my_data; in lpddr2_nvm_write() local
330 add = start_add; in lpddr2_nvm_write()
335 if (!(IS_ALIGNED(add, mtd->writesize))) { /* do sw program */ in lpddr2_nvm_write()
343 my_data, add, 0x00, NULL); in lpddr2_nvm_write()
[all …]
/drivers/gpu/drm/i915/gt/shaders/clear_kernel/
Dhsw.asm39 add(1) g1.2<1>UD g1.2<0,1,0>UD 0x00000001UD { align1 1N }; /* Loop count to del…
54 add(1) g3<1>D g3<0,1,0>D g3.5<0,1,0>D { align1 1N }; /* g3 = sliceID * Su…
58 add(1) g3.2<1>D g3.2<0,1,0>D g3.4<0,1,0>D { align1 1N }; /* g3.2 now points t…
74 add(1) g5<1>D g5<0,1,0>D 1D { align1 1N };
81 add.nz.f0.0(1) g1.2<1>UD g1.2<0,1,0>UD -1D { align1 1N };
107 add(1) g2<1>UD g1<0,1,0>UW 0x0010UW { align1 1N };
112 add.nz.f0.0(1) a0.4<1>W a0.4<0,1,0>W -1W { align1 1N };
114 add(1) a0<1>D a0<0,1,0>D 32D { align1 1N };
Divb.asm39 add(1) g1.2<1>UD g1.2<0,1,0>UD 0x00000001UD { align1 1N }; /* Loop count to del…
54 add(1) g3<1>D g3<0,1,0>D g3.5<0,1,0>D { align1 1N }; /* g3 = sliceID * Su…
58 add(1) g3.2<1>D g3.2<0,1,0>D g3.4<0,1,0>D { align1 1N }; /* g3.2 now points t…
73 add(1) g5<1>D g5<0,1,0>D 1D { align1 1N };
79 add.nz.f0.0(1) g1.2<1>UD g1.2<0,1,0>UD -1D { align1 1N };
105 add(1) g2<1>UD g1<0,1,0>UW 0x0010UW { align1 1N };
110 add.nz.f0.0(1) a0.4<1>W a0.4<0,1,0>W -1W { align1 1N };
112 add(1) a0<1>D a0<0,1,0>D 32D { align1 1N };
/drivers/input/rmi4/
DKconfig50 Say Y here if you want to add support for RMI4 function 03.
69 Say Y here if you want to add support for RMI4 function 11.
79 Say Y here if you want to add support for RMI4 function 12.
88 Say Y here if you want to add support for RMI4 function 30.
97 Say Y here if you want to add support for RMI4 function 34.
106 Say Y here if you want to add support for RMI4 function 3A.
117 Say Y here if you want to add support for RMI4 function 54
125 Say Y here if you want to add support for RMI4 function 55
/drivers/net/ethernet/aquantia/atlantic/
Daq_filters.c310 struct aq_rx_filter_l2 *data, bool add) in aq_set_data_fl2() argument
331 struct aq_rx_filter *aq_rx_fltr, bool add) in aq_add_del_fether() argument
337 aq_set_data_fl2(aq_nic, aq_rx_fltr, &data, add); in aq_add_del_fether()
344 if (add) in aq_add_del_fether()
403 struct aq_rx_filter_vlan *aq_vlans, bool add) in aq_set_data_fvlan() argument
411 if (!add) in aq_set_data_fvlan()
454 struct aq_rx_filter *aq_rx_fltr, bool add) in aq_add_del_fvlan() argument
464 add); in aq_add_del_fvlan()
471 struct aq_rx_filter_l3l4 *data, bool add) in aq_set_data_fl3l4() argument
481 if (!add) { in aq_set_data_fl3l4()
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
Dmemx.fuc197 add b32 $r1 0x4
210 add b32 $r1 0x4
226 add b32 $r1 0x08
248 add b32 $r1 0x10
261 add b32 $r1 0x04
312 add b32 $r12 $r13 0
340 add b32 $r5 1
344 add b32 $r10 $r7 #memx_train_head
346 add b32 $r6 1
347 add b32 $r7 4
[all …]
Dkernel.fuc171 add b32 $r14 #proc_size
192 add b32 $r8 1
339 // of the watchdog and add this time to the wanted ticks
343 add b32 $r14 $r9
398 add b32 $r8 #proc_queue
399 add b32 $r8 $r14
408 add b32 $r9 1
433 add b32 $r8 #proc_size
471 add b32 $r8 1
482 add b32 $r14 $r9
[all …]
/drivers/media/test-drivers/vicodec/
Dcodec-fwht.c256 int add = intra ? 256 : 0; in fwht() local
263 workspace1[0] = tmp[0] + tmp[1] - add; in fwht()
266 workspace1[2] = tmp[2] + tmp[3] - add; in fwht()
269 workspace1[4] = tmp[4] + tmp[5] - add; in fwht()
272 workspace1[6] = tmp[6] + tmp[7] - add; in fwht()
276 workspace1[0] = tmp[0] + tmp[2] - add; in fwht()
279 workspace1[2] = tmp[4] + tmp[6] - add; in fwht()
282 workspace1[4] = tmp[8] + tmp[10] - add; in fwht()
285 workspace1[6] = tmp[12] + tmp[14] - add; in fwht()
289 workspace1[0] = tmp[0] + tmp[3] - add; in fwht()
[all …]
/drivers/phy/freescale/
DKconfig17 Enable this to add support for the Mixel LVDS PHY as found
27 Enable this to add support for the Mixel DSI PHY as found
35 Enable this to add support for the PCIE PHY as found on
46 Enable this to add support for the Lynx SerDes 28G PHY as
/drivers/net/ethernet/intel/i40e/
Di40e_txrx.c23 struct i40e_fdir_filter *fdata, bool add) in i40e_fdir() argument
53 dtype_cmd |= add ? in i40e_fdir()
88 bool add) in i40e_program_fdir_filter() argument
122 i40e_fdir(tx_ring, fdir_data, add); in i40e_program_fdir_filter()
309 bool add, char *packet_addr, in i40e_prepare_fdir_filter() argument
329 ret = i40e_program_fdir_filter(fd_data, packet_addr, pf, add); in i40e_prepare_fdir_filter()
337 if (add) in i40e_prepare_fdir_filter()
359 static void i40e_change_filter_num(bool ipv4, bool add, u16 *ipv4_filter_num, in i40e_change_filter_num() argument
362 if (add) { in i40e_change_filter_num()
388 bool add, in i40e_add_del_fdir_udp() argument
[all …]
/drivers/soc/mediatek/
DKconfig15 Say yes here to add support for the MediaTek Command Queue (CMDQ)
33 Say yes here to add support for the MediaTek INFRACFG controller. The
43 Say yes here to add support for MediaTek PMIC Wrapper found
55 Say yes here to add support for the MediaTek SCPSYS power domain
75 Say yes here to add support for the MediaTek Multimedia
/drivers/s390/cio/
Dblacklist.c43 typedef enum {add, free} range_action; enumerator
63 if (action == add) in blacklist_range()
163 if (ra == add) in blacklist_parse_parameters()
166 ra = add; in blacklist_parse_parameters()
230 if (blacklist_parse_parameters(str, add, 1)) in blacklist_setup()
272 rc = blacklist_parse_parameters(buf, add, 0); in blacklist_parse_proc_parameters()
/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
Dg98.fuc0s186 add b32 $r8 $r6 0x180
241 add b32 $r5 ((#ctx_dma - 0x60 * 4) & 0xffff)
244 add b32 $r4 0x180 - 0x60
253 add b32 $r4 $r5
387 add b32 $r6 0x10
388 add b32 $r5 0x10
489 add b32 $r9 $r5
497 add b32 $r9 $r7
640 add b32 $r3 $r5
651 add b32 $r5 0x10
[all …]
/drivers/of/unittest-data/
Doverlay_common.dtsi6 * Do not add any properties in node "/".
7 * Do not add any nodes other than "/testcase-data-2" in node "/".
8 * Do not add anything that would result in dtc creating node "/__fixups__".
/drivers/memory/
Dti-emif-sram-pm.S115 add r4, r2, #EMIF_EXT_PHY_CTRL_VALS_OFFSET
116 add r3, r0, #EMIF_EXT_PHY_CTRL_1
120 add r5, r5, #0x4
212 add r3, r2, #EMIF_EXT_PHY_CTRL_VALS_OFFSET
213 add r4, r0, #EMIF_EXT_PHY_CTRL_1
217 add r5, r5, #0x4
/drivers/devfreq/event/
DKconfig23 This add the devfreq-event driver for Exynos SoC. It provides NoC
31 This add the devfreq-event driver for Exynos SoC. It provides PPMU
39 This add the devfreq-event driver for Rockchip SoC. It provides DFI
/drivers/staging/nvec/
DTODO2 - add compile as module support
6 - add support for more device implementations
/drivers/pinctrl/
Dpinctrl-palmas.c745 int base, add; in palmas_pinconf_get() local
780 add = opt->pud_info->pullup_dn_reg_add; in palmas_pinconf_get()
781 ret = palmas_read(pci->palmas, base, add, &val); in palmas_pinconf_get()
784 add, ret); in palmas_pinconf_get()
812 add = opt->od_info->od_reg_add; in palmas_pinconf_get()
813 ret = palmas_read(pci->palmas, base, add, &val); in palmas_pinconf_get()
816 add, ret); in palmas_pinconf_get()
854 int base, add, mask; in palmas_pinconf_set() local
893 add = opt->pud_info->pullup_dn_reg_add; in palmas_pinconf_set()
919 add = opt->od_info->od_reg_add; in palmas_pinconf_set()
[all …]
/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_init_ops.h333 int add; member
498 REG_WR(bp, read_arb_addr[i].add, in bnx2x_init_pxp_arb()
499 read_arb_data[i][r_order].add); in bnx2x_init_pxp_arb()
511 REG_WR(bp, write_arb_addr[i].add, in bnx2x_init_pxp_arb()
512 write_arb_data[i][w_order].add); in bnx2x_init_pxp_arb()
522 val = REG_RD(bp, write_arb_addr[i].add); in bnx2x_init_pxp_arb()
523 REG_WR(bp, write_arb_addr[i].add, in bnx2x_init_pxp_arb()
524 val | (write_arb_data[i][w_order].add << 10)); in bnx2x_init_pxp_arb()
532 val = write_arb_data[NUM_WR_Q-1][w_order].add; in bnx2x_init_pxp_arb()
537 val = read_arb_data[NUM_RD_Q-1][r_order].add; in bnx2x_init_pxp_arb()

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