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Searched refs:amdgpu_ih_ring (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ih.h48 struct amdgpu_ih_ring { struct
81 u32 (*get_wptr)(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih); argument
82 void (*decode_iv)(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih,
84 uint64_t (*decode_iv_ts)(struct amdgpu_ih_ring *ih, u32 rptr,
86 void (*set_rptr)(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih);
97 int amdgpu_ih_ring_init(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih,
99 void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih);
100 void amdgpu_ih_ring_write(struct amdgpu_ih_ring *ih, const uint32_t *iv,
103 struct amdgpu_ih_ring *ih);
104 int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih);
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Damdgpu_ih.c41 int amdgpu_ih_ring_init(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih, in amdgpu_ih_ring_init()
116 void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) in amdgpu_ih_ring_fini()
148 void amdgpu_ih_ring_write(struct amdgpu_ih_ring *ih, const uint32_t *iv, in amdgpu_ih_ring_write()
176 struct amdgpu_ih_ring *ih) in amdgpu_ih_wait_on_checkpoint_process_ts()
204 int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) in amdgpu_ih_process()
249 struct amdgpu_ih_ring *ih, in amdgpu_ih_decode_iv_helper()
283 uint64_t amdgpu_ih_decode_iv_ts_helper(struct amdgpu_ih_ring *ih, u32 rptr, in amdgpu_ih_decode_iv_ts_helper()
Dvega10_ih.c97 struct amdgpu_ih_ring *ih, in vega10_ih_toggle_ring_interrupts()
143 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega10_ih_toggle_interrupts()
158 static uint32_t vega10_ih_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t ih_rb_cntl) in vega10_ih_rb_cntl()
181 static uint32_t vega10_ih_doorbell_rptr(struct amdgpu_ih_ring *ih) in vega10_ih_doorbell_rptr()
209 struct amdgpu_ih_ring *ih) in vega10_ih_enable_ring()
263 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega10_ih_irq_init()
336 struct amdgpu_ih_ring *ih) in vega10_ih_get_wptr()
388 struct amdgpu_ih_ring *ih) in vega10_ih_irq_rearm()
414 struct amdgpu_ih_ring *ih) in vega10_ih_set_rptr()
Damdgpu_irq.h47 struct amdgpu_ih_ring *ih;
92 struct amdgpu_ih_ring ih, ih1, ih2, ih_soft;
112 struct amdgpu_ih_ring *ih);
Dih_v6_0.c128 struct amdgpu_ih_ring *ih, in ih_v6_0_toggle_ring_interrupts()
172 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1}; in ih_v6_0_toggle_interrupts()
187 static uint32_t ih_v6_0_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t ih_rb_cntl) in ih_v6_0_rb_cntl()
210 static uint32_t ih_v6_0_doorbell_rptr(struct amdgpu_ih_ring *ih) in ih_v6_0_doorbell_rptr()
238 struct amdgpu_ih_ring *ih) in ih_v6_0_enable_ring()
295 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1}; in ih_v6_0_irq_init()
391 struct amdgpu_ih_ring *ih) in ih_v6_0_get_wptr()
431 struct amdgpu_ih_ring *ih) in ih_v6_0_irq_rearm()
457 struct amdgpu_ih_ring *ih) in ih_v6_0_set_rptr()
Dvega20_ih.c100 struct amdgpu_ih_ring *ih, in vega20_ih_toggle_ring_interrupts()
147 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega20_ih_toggle_interrupts()
162 static uint32_t vega20_ih_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t ih_rb_cntl) in vega20_ih_rb_cntl()
185 static uint32_t vega20_ih_doorbell_rptr(struct amdgpu_ih_ring *ih) in vega20_ih_doorbell_rptr()
213 struct amdgpu_ih_ring *ih) in vega20_ih_enable_ring()
299 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega20_ih_irq_init()
387 struct amdgpu_ih_ring *ih) in vega20_ih_get_wptr()
439 struct amdgpu_ih_ring *ih) in vega20_ih_irq_rearm()
466 struct amdgpu_ih_ring *ih) in vega20_ih_set_rptr()
Dnavi10_ih.c153 struct amdgpu_ih_ring *ih, in navi10_ih_toggle_ring_interrupts()
198 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in navi10_ih_toggle_interrupts()
213 static uint32_t navi10_ih_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t ih_rb_cntl) in navi10_ih_rb_cntl()
236 static uint32_t navi10_ih_doorbell_rptr(struct amdgpu_ih_ring *ih) in navi10_ih_doorbell_rptr()
264 struct amdgpu_ih_ring *ih) in navi10_ih_enable_ring()
319 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in navi10_ih_irq_init()
407 struct amdgpu_ih_ring *ih) in navi10_ih_get_wptr()
457 struct amdgpu_ih_ring *ih) in navi10_ih_irq_rearm()
484 struct amdgpu_ih_ring *ih) in navi10_ih_set_rptr()
Dcik_ih.c108 struct amdgpu_ih_ring *ih = &adev->irq.ih; in cik_ih_irq_init()
189 struct amdgpu_ih_ring *ih) in cik_ih_get_wptr()
243 struct amdgpu_ih_ring *ih, in cik_ih_decode_iv()
275 struct amdgpu_ih_ring *ih) in cik_ih_set_rptr()
Dsi_ih.c64 struct amdgpu_ih_ring *ih = &adev->irq.ih; in si_ih_irq_init()
108 struct amdgpu_ih_ring *ih) in si_ih_get_wptr()
127 struct amdgpu_ih_ring *ih, in si_ih_decode_iv()
148 struct amdgpu_ih_ring *ih) in si_ih_set_rptr()
Dcz_ih.c108 struct amdgpu_ih_ring *ih = &adev->irq.ih; in cz_ih_irq_init()
191 struct amdgpu_ih_ring *ih) in cz_ih_get_wptr()
235 struct amdgpu_ih_ring *ih, in cz_ih_decode_iv()
267 struct amdgpu_ih_ring *ih) in cz_ih_set_rptr()
Diceland_ih.c108 struct amdgpu_ih_ring *ih = &adev->irq.ih; in iceland_ih_irq_init()
191 struct amdgpu_ih_ring *ih) in iceland_ih_get_wptr()
234 struct amdgpu_ih_ring *ih, in iceland_ih_decode_iv()
266 struct amdgpu_ih_ring *ih) in iceland_ih_set_rptr()
Dtonga_ih.c105 struct amdgpu_ih_ring *ih = &adev->irq.ih; in tonga_ih_irq_init()
193 struct amdgpu_ih_ring *ih) in tonga_ih_get_wptr()
237 struct amdgpu_ih_ring *ih, in tonga_ih_decode_iv()
269 struct amdgpu_ih_ring *ih) in tonga_ih_set_rptr()
Damdgpu_gmc.h350 struct amdgpu_ih_ring *ih, uint64_t addr,
Damdgpu_irq.c472 struct amdgpu_ih_ring *ih) in amdgpu_irq_dispatch()
Damdgpu_gmc.c366 struct amdgpu_ih_ring *ih, uint64_t addr, in amdgpu_gmc_filter_faults()