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Searched refs:bit_off (Results 1 – 8 of 8) sorted by relevance

/drivers/pinctrl/
Dpinctrl-digicolor.c129 int bit_off, reg_off; in dc_set_mux() local
132 dc_client_sel(group, &reg_off, &bit_off); in dc_set_mux()
135 reg &= ~(3 << bit_off); in dc_set_mux()
136 reg |= (selector << bit_off); in dc_set_mux()
147 int bit_off, reg_off; in dc_pmx_request_gpio() local
150 dc_client_sel(offset, &reg_off, &bit_off); in dc_pmx_request_gpio()
153 if ((reg & (3 << bit_off)) != 0) in dc_pmx_request_gpio()
171 int bit_off = gpio % PINS_PER_COLLECTION; in dc_gpio_direction_input() local
177 drive &= ~BIT(bit_off); in dc_gpio_direction_input()
191 int bit_off = gpio % PINS_PER_COLLECTION; in dc_gpio_direction_output() local
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/drivers/pinctrl/sunplus/
Dsppctl.c114 u32 bit_off; in sppctl_get_reg_and_bit_offset() local
118 bit_off = offset % 32; in sppctl_get_reg_and_bit_offset()
120 return bit_off; in sppctl_get_reg_and_bit_offset()
125 u32 bit_off; in sppctl_get_moon_reg_and_bit_offset() local
134 bit_off = offset % 16; in sppctl_get_moon_reg_and_bit_offset()
136 return bit_off; in sppctl_get_moon_reg_and_bit_offset()
141 u32 bit_off; in sppctl_prep_moon_reg_and_offset() local
143 bit_off = sppctl_get_moon_reg_and_bit_offset(offset, reg_off); in sppctl_prep_moon_reg_and_offset()
145 return SPPCTL_SET_MOON_REG_BIT(bit_off); in sppctl_prep_moon_reg_and_offset()
147 return SPPCTL_CLR_MOON_REG_BIT(bit_off); in sppctl_prep_moon_reg_and_offset()
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/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_vbif.c60 u32 bit_off; in dpu_hw_set_mem_type() local
78 bit_off = (xin_id & 0x7) * 4; in dpu_hw_set_mem_type()
80 reg_val &= ~(0x7 << bit_off); in dpu_hw_set_mem_type()
81 reg_val |= (value & 0x7) << bit_off; in dpu_hw_set_mem_type()
91 u32 bit_off; in dpu_hw_set_limit_conf() local
99 bit_off = (xin_id % 4) * 8; in dpu_hw_set_limit_conf()
101 reg_val &= ~(0xFF << bit_off); in dpu_hw_set_limit_conf()
102 reg_val |= (limit) << bit_off; in dpu_hw_set_limit_conf()
112 u32 bit_off; in dpu_hw_get_limit_conf() local
121 bit_off = (xin_id % 4) * 8; in dpu_hw_get_limit_conf()
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Ddpu_hw_catalog.c393 .reg_off = 0x2AC, .bit_off = 0},
395 .reg_off = 0x2B4, .bit_off = 0},
397 .reg_off = 0x2BC, .bit_off = 0},
399 .reg_off = 0x2C4, .bit_off = 0},
401 .reg_off = 0x2AC, .bit_off = 8},
403 .reg_off = 0x2B4, .bit_off = 8},
405 .reg_off = 0x2C4, .bit_off = 8},
407 .reg_off = 0x2C4, .bit_off = 12},
409 .reg_off = 0x3A8, .bit_off = 15},
411 .reg_off = 0x3B0, .bit_off = 15},
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Ddpu_hw_top.c95 u32 reg_off, bit_off; in dpu_hw_setup_clk_force_ctrl() local
108 bit_off = mdp->caps->clk_ctrls[clk_ctrl].bit_off; in dpu_hw_setup_clk_force_ctrl()
113 new_val = reg_val | BIT(bit_off); in dpu_hw_setup_clk_force_ctrl()
115 new_val = reg_val & ~BIT(bit_off); in dpu_hw_setup_clk_force_ctrl()
119 clk_forced_on = !(reg_val & BIT(bit_off)); in dpu_hw_setup_clk_force_ctrl()
Ddpu_hw_catalog.h515 u32 bit_off; member
/drivers/thermal/samsung/
Dexynos_tmu.c525 unsigned int reg_off, bit_off; in exynos7_tmu_set_trip_temp() local
529 bit_off = ((8 - trip) % 2); in exynos7_tmu_set_trip_temp()
532 th &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off)); in exynos7_tmu_set_trip_temp()
533 th |= temp_to_code(data, temp) << (16 * bit_off); in exynos7_tmu_set_trip_temp()
540 unsigned int reg_off, bit_off; in exynos7_tmu_set_trip_hyst() local
544 bit_off = ((8 - trip) % 2); in exynos7_tmu_set_trip_hyst()
547 th &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off)); in exynos7_tmu_set_trip_hyst()
548 th |= temp_to_code(data, temp - hyst) << (16 * bit_off); in exynos7_tmu_set_trip_hyst()
/drivers/gpu/drm/
Ddrm_fb_helper.c730 off_t bit_off = (off % line_length) * 8; in drm_fb_helper_memory_range_to_clip() local
733 x1 = bit_off / info->var.bits_per_pixel; in drm_fb_helper_memory_range_to_clip()