Searched refs:byte_clk (Results 1 – 3 of 3) sorted by relevance
/drivers/gpu/drm/sprd/ |
D | sprd_dsi.c | 389 #define ns_to_cycle(ns, byte_clk) \ argument 390 DIV_ROUND_UP((ns) * (byte_clk), 1000000) 395 u32 byte_clk = dsi->slave->hs_rate / 8; in sprd_dsi_init() local 412 div = DIV_ROUND_UP(byte_clk, dsi->slave->lp_rate); in sprd_dsi_init() 415 max_rd_time = ns_to_cycle(ctx->max_rd_time, byte_clk); in sprd_dsi_init() 418 data_hs2lp = ns_to_cycle(ctx->data_hs2lp, byte_clk); in sprd_dsi_init() 419 data_lp2hs = ns_to_cycle(ctx->data_lp2hs, byte_clk); in sprd_dsi_init() 420 clk_hs2lp = ns_to_cycle(ctx->clk_hs2lp, byte_clk); in sprd_dsi_init() 421 clk_lp2hs = ns_to_cycle(ctx->clk_lp2hs, byte_clk); in sprd_dsi_init() 454 u32 byte_clk = dsi->slave->hs_rate / 8; in sprd_dsi_dpi_video() local [all …]
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/drivers/gpu/drm/msm/dsi/ |
D | dsi_host.c | 117 struct clk *byte_clk; member 325 msm_host->byte_clk = msm_clk_get(pdev, "byte"); in dsi_clk_init() 326 if (IS_ERR(msm_host->byte_clk)) { in dsi_clk_init() 327 ret = PTR_ERR(msm_host->byte_clk); in dsi_clk_init() 330 msm_host->byte_clk = NULL; in dsi_clk_init() 352 msm_host->byte_clk_src = clk_get_parent(msm_host->byte_clk); in dsi_clk_init() 450 ret = clk_prepare_enable(msm_host->byte_clk); in dsi_link_clk_enable_6g() 474 clk_disable_unprepare(msm_host->byte_clk); in dsi_link_clk_enable_6g() 489 ret = clk_set_rate(msm_host->byte_clk, msm_host->byte_clk_rate); in dsi_link_clk_set_rate_v2() 520 ret = clk_prepare_enable(msm_host->byte_clk); in dsi_link_clk_enable_v2() [all …]
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/drivers/gpu/drm/exynos/ |
D | exynos_drm_dsi.c | 650 unsigned long hs_clk, byte_clk, esc_clk; in exynos_dsi_enable_clock() local 660 byte_clk = hs_clk / 8; in exynos_dsi_enable_clock() 661 esc_div = DIV_ROUND_UP(byte_clk, dsi->esc_clk_rate); in exynos_dsi_enable_clock() 662 esc_clk = byte_clk / esc_div; in exynos_dsi_enable_clock() 666 esc_clk = byte_clk / esc_div; in exynos_dsi_enable_clock() 670 hs_clk, byte_clk, esc_clk); in exynos_dsi_enable_clock()
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