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Searched refs:clcd_synth_parents (Results 1 – 2 of 2) sorted by relevance

/drivers/clk/spear/
Dspear1340_clock.c427 static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", }; variable
727 clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents, in spear1340_clk_init()
728 ARRAY_SIZE(clcd_synth_parents), in spear1340_clk_init()
Dspear1310_clock.c363 static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", }; variable
631 clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents, in spear1310_clk_init()
632 ARRAY_SIZE(clcd_synth_parents), in spear1310_clk_init()