Searched refs:clock_idx (Results 1 – 4 of 4) sorted by relevance
243 if (gate->clock_idx < 32) in get_clock_reg()252 u32 clk = get_bit(gate->clock_idx); in aspeed_g6_clk_is_enabled()281 u32 clk = get_bit(gate->clock_idx); in aspeed_g6_clk_enable()323 u32 clk = get_bit(gate->clock_idx); in aspeed_g6_clk_disable()388 struct regmap *map, u8 clock_idx, u8 reset_idx, in aspeed_g6_clk_hw_register_gate() argument407 gate->clock_idx = clock_idx; in aspeed_g6_clk_hw_register_gate()659 gate_flags = (gd->clock_idx == 14) ? 0 : CLK_GATE_SET_TO_DISABLE; in aspeed_g6_clk_probe()665 gd->clock_idx, in aspeed_g6_clk_probe()
187 u32 clk = BIT(gate->clock_idx); in aspeed_clk_is_enabled()213 u32 clk = BIT(gate->clock_idx); in aspeed_clk_enable()253 u32 clk = BIT(gate->clock_idx); in aspeed_clk_disable()347 struct regmap *map, u8 clock_idx, u8 reset_idx, in aspeed_clk_hw_register_gate() argument366 gate->clock_idx = clock_idx; in aspeed_clk_hw_register_gate()549 gate_flags = (gd->clock_idx == 14) ? 0 : CLK_GATE_SET_TO_DISABLE; in aspeed_clk_probe()555 gd->clock_idx, in aspeed_clk_probe()
26 u8 clock_idx; member50 u8 clock_idx; member
1075 int clock_idx; member1094 struct mvebu_uart_clock_base, clocks[uart_clock->clock_idx])1216 if (uart_clock->clock_idx == 0) in mvebu_uart_clock_enable()1240 if (uart_clock->clock_idx == 0) in mvebu_uart_clock_disable()1259 if (uart_clock->clock_idx == 0) in mvebu_uart_clock_is_enabled()1429 uart_clock_base->clocks[i].clock_idx = i; in mvebu_uart_clock_probe()