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Searched refs:clrsetbits_32 (Results 1 – 3 of 3) sorted by relevance

/drivers/crypto/caam/
Dctrl.c112 clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0); in run_descriptor_deco0()
121 clrsetbits_32(&ctrl->deco_rq, 0, DECORR_RQD0ENABLE); in run_descriptor_deco0()
129 clrsetbits_32(&ctrl->deco_rq, DECORR_RQD0ENABLE, 0); in run_descriptor_deco0()
145 clrsetbits_32(&deco->jr_ctl_hi, 0, flags); in run_descriptor_deco0()
173 clrsetbits_32(&ctrl->deco_rsr, DECORSR_JR0, 0); in run_descriptor_deco0()
176 clrsetbits_32(&ctrl->deco_rq, DECORR_RQD0ENABLE, 0); in run_descriptor_deco0()
366 clrsetbits_32(&r4tst->rtmctl, 0, RTMCTL_PRGM | RTMCTL_ACC); in kick_trng()
396 clrsetbits_32(&r4tst->rtmctl, RTMCTL_PRGM | RTMCTL_ACC, in kick_trng()
481 clrsetbits_32(mcr, MCFGR_AXIPIPE_MASK, in handle_imx6_err005766()
745 clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK, in caam_probe()
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Djr.c84 clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK); in caam_reset_hw_jr()
110 clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0); in caam_reset_hw_jr()
192 clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JRCFG_IMSK); in caam_jr_interrupt()
283 clrsetbits_32(&jrp->rregs->rconfig_lo, JRCFG_IMSK, 0); in caam_jr_dequeue()
483 clrsetbits_32(&jrp->rregs->rconfig_lo, 0, JOBR_INTC | in caam_jr_init()
Dregs.h117 static inline void clrsetbits_32(void __iomem *reg, u32 clear, u32 set) in clrsetbits_32() function