Searched refs:cobalt_info (Results 1 – 7 of 7) sorted by relevance
/drivers/media/pci/cobalt/ |
D | cobalt-cpld.c | 30 cobalt_info("CPLD System control register (read/write)\n"); in cpld_info_ver3() 31 cobalt_info("\t\tSystem control: 0x%04x (0x0f00)\n", in cpld_info_ver3() 33 cobalt_info("CPLD Clock control register (read/write)\n"); in cpld_info_ver3() 34 cobalt_info("\t\tClock control: 0x%04x (0x0000)\n", in cpld_info_ver3() 36 …cobalt_info("CPLD HSMA Clk Osc register (read/write) - Must set wr trigger to load default values\… in cpld_info_ver3() 37 cobalt_info("\t\tRegister #7:\t0x%04x (0x0022)\n", in cpld_info_ver3() 39 cobalt_info("\t\tRegister #8:\t0x%04x (0x0047)\n", in cpld_info_ver3() 41 cobalt_info("\t\tRegister #9:\t0x%04x (0x00fa)\n", in cpld_info_ver3() 43 cobalt_info("\t\tRegister #10:\t0x%04x (0x0061)\n", in cpld_info_ver3() 45 cobalt_info("\t\tRegister #11:\t0x%04x (0x001e)\n", in cpld_info_ver3() [all …]
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D | cobalt-driver.c | 200 cobalt_info("PCIe device capability 0x%08x: Max payload %d\n", in cobalt_pcie_status_show() 202 cobalt_info("PCIe device control 0x%04x: Max payload %d. Max read request %d\n", in cobalt_pcie_status_show() 206 cobalt_info("PCIe device status 0x%04x\n", stat); in cobalt_pcie_status_show() 212 cobalt_info("PCIe link capability 0x%08x: %s per lane and %u lanes\n", in cobalt_pcie_status_show() 215 cobalt_info("PCIe link control 0x%04x\n", ctrl); in cobalt_pcie_status_show() 216 cobalt_info("PCIe link status 0x%04x: %s per lane and %u lanes\n", in cobalt_pcie_status_show() 222 cobalt_info("PCIe bus link capability 0x%08x: %s per lane and %u lanes\n", in cobalt_pcie_status_show() 230 cobalt_info("PCIe slot capability 0x%08x\n", capa); in cobalt_pcie_status_show() 231 cobalt_info("PCIe slot control 0x%04x\n", ctrl); in cobalt_pcie_status_show() 232 cobalt_info("PCIe slot status 0x%04x\n", stat); in cobalt_pcie_status_show() [all …]
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D | cobalt-v4l2.c | 68 cobalt_info("data will not fit into plane (%lu < %u)\n", in cobalt_buf_init() 443 cobalt_info("cobalt_cobaltc: adrs = %p\n", adrs); in cobalt_cobaltc() 514 cobalt_info("rx%d: cvi resolution: %dx%d\n", rx, in cobalt_video_input_status_show() 516 cobalt_info("rx%d: cvi control: %s%s%s\n", rx, in cobalt_video_input_status_show() 523 cobalt_info("rx%d: cvi status: %s%s\n", rx, in cobalt_video_input_status_show() 529 cobalt_info("rx%d: Measurements: %s%s%s%s%s%s%s\n", rx, in cobalt_video_input_status_show() 544 cobalt_info("rx%d: irq_status: 0x%02x irq_triggers: 0x%02x\n", rx, in cobalt_video_input_status_show() 547 cobalt_info("rx%d: vsync: %d\n", rx, ioread32(&vmr->vsync_time)); in cobalt_video_input_status_show() 548 cobalt_info("rx%d: vbp: %d\n", rx, ioread32(&vmr->vback_porch)); in cobalt_video_input_status_show() 549 cobalt_info("rx%d: vact: %d\n", rx, ioread32(&vmr->vactive_area)); in cobalt_video_input_status_show() [all …]
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D | cobalt-omnitek.c | 71 cobalt_info("Omnitek DMA capability: ID 0x%02x Version 0x%02x Next 0x%x Size 0x%x\n", in show_dma_capability() 77 cobalt_info("Omnitek DMA: 32 bits PCIe and Local\n"); in show_dma_capability() 80 cobalt_info("Omnitek DMA: 64 bits PCIe, 32 bits Local\n"); in show_dma_capability() 83 cobalt_info("Omnitek DMA: 64 bits PCIe and Local\n"); in show_dma_capability() 90 cobalt_info("Omnitek DMA channel #%d: %s %s\n", i, in show_dma_capability()
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D | cobalt-irq.c | 168 cobalt_info("full rx FIFO %d\n", i); in cobalt_irq_handler() 225 cobalt_info("irq: adv1=%u adv2=%u advout=%u none=%u full=%u\n", in cobalt_irq_log_status() 228 cobalt_info("irq: dma_tot=%u (", cobalt->irq_dma_tot); in cobalt_irq_log_status()
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D | cobalt-i2c.c | 369 cobalt_info("registered bus %s\n", adap->name); in cobalt_i2c_init()
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D | cobalt-driver.h | 160 #define cobalt_info(fmt, arg...) v4l2_info(&cobalt->v4l2_dev, fmt, ## arg) macro
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