Home
last modified time | relevance | path

Searched refs:contig (Results 1 – 21 of 21) sorted by relevance

/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
Dmemgf100.c77 bool contig; in gf100_mem_new() local
80 contig = args->v0.contig; in gf100_mem_new()
83 contig = false; in gf100_mem_new()
93 size, contig, false, pmemory); in gf100_mem_new()
Dmemnv50.c74 bool contig; in nv50_mem_new() local
78 contig = args->v0.contig; in nv50_mem_new()
82 contig = false; in nv50_mem_new()
87 page, size, contig, false, pmemory); in nv50_mem_new()
/drivers/gpu/drm/nouveau/
Dnouveau_mem.c125 nouveau_mem_vram(struct ttm_resource *reg, bool contig, u8 page) in nouveau_mem_vram() argument
140 .contig = contig, in nouveau_mem_vram()
149 .contig = contig, in nouveau_mem_vram()
Dnouveau_bo.h34 unsigned contig:1; member
82 int nouveau_bo_pin(struct nouveau_bo *, u32 flags, bool contig);
Dnouveau_mem.h34 int nouveau_mem_vram(struct ttm_resource *, bool contig, u8 page);
Dnouveau_bo.c254 nvbo->contig = !(tile_flags & NOUVEAU_GEM_TILE_NONCONTIG); in nouveau_bo_alloc()
421 nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t domain, bool contig) in nouveau_bo_pin() argument
433 domain == NOUVEAU_GEM_DOMAIN_VRAM && contig) { in nouveau_bo_pin()
434 if (!nvbo->contig) { in nouveau_bo_pin()
435 nvbo->contig = true; in nouveau_bo_pin()
492 nvbo->contig = false; in nouveau_bo_pin()
Dnouveau_ttm.c82 ret = nouveau_mem_vram(*res, nvbo->contig, nvbo->page); in nouveau_vram_manager_new()
Dnouveau_gem.c293 rep->tile_flags = nvbo->contig ? 0 : NOUVEAU_GEM_TILE_NONCONTIG; in nouveau_gem_info()
/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/
Drx.c146 u32 contig, alloc; in mlx5e_xsk_alloc_rx_wqes_batched() local
156 contig = mlx5_wq_cyc_get_size(wq) - ix; in mlx5e_xsk_alloc_rx_wqes_batched()
157 if (wqe_bulk <= contig) { in mlx5e_xsk_alloc_rx_wqes_batched()
160 alloc = xsk_buff_alloc_batch(rq->xsk_pool, buffs + ix, contig); in mlx5e_xsk_alloc_rx_wqes_batched()
161 if (likely(alloc == contig)) in mlx5e_xsk_alloc_rx_wqes_batched()
162 alloc += xsk_buff_alloc_batch(rq->xsk_pool, buffs, wqe_bulk - contig); in mlx5e_xsk_alloc_rx_wqes_batched()
/drivers/gpu/drm/nouveau/include/nvif/
Dif900b.h12 __u8 contig; member
Dif500b.h13 __u8 contig; member
/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dram.c105 bool contig, bool back, struct nvkm_memory **pmemory) in nvkm_ram_get() argument
114 u32 min = contig ? max : align; in nvkm_ram_get()
/drivers/media/common/videobuf2/
DMakefile12 obj-$(CONFIG_VIDEOBUF2_DMA_CONTIG) += videobuf2-dma-contig.o
/drivers/net/ethernet/freescale/dpaa/
Ddpaa_eth_trace.h19 fd_format_name(contig), \
/drivers/media/v4l2-core/
DMakefile35 obj-$(CONFIG_VIDEOBUF_DMA_CONTIG) += videobuf-dma-contig.o
/drivers/gpu/drm/nouveau/include/nvkm/subdev/
Dfb.h153 bool contig, bool back, struct nvkm_memory **);
/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_switch.c154 alloc_req.contig = true; in rvu_switch_enable()
Drvu_npc.c2570 if (req->contig) { in npc_mcam_alloc_entries()
2636 if (!req->contig && rsp->count) { in npc_mcam_alloc_entries()
2648 index = req->contig ? in npc_mcam_alloc_entries()
2702 if (!req->contig && req->count > NPC_MAX_NONCONTIG_ENTRIES) { in rvu_mbox_handler_npc_mcam_alloc_entry()
2980 if (!req->contig && req->count > NPC_MAX_NONCONTIG_COUNTERS) in rvu_mbox_handler_npc_mcam_alloc_counter()
2993 if (req->contig) { in rvu_mbox_handler_npc_mcam_alloc_counter()
3185 entry_req.contig = true; in rvu_mbox_handler_npc_mcam_alloc_and_write_entry()
3205 cntr_req.contig = true; in rvu_mbox_handler_npc_mcam_alloc_and_write_entry()
Dmbox.h1294 u8 contig; /* Contiguous entries ? */ member
1358 u8 contig; /* Contiguous counters ? */ member
Drvu_npc_fs.c995 cntr_req.contig = true; in rvu_mcam_add_counter_to_rule()
1610 cntr_req.contig = true; in npc_install_mcam_drop_rule()
/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_flows.c106 req->contig = false; in otx2_alloc_mcam_entries()
191 req->contig = false; in otx2_mcam_entry_init()