Searched refs:cp_ecc_error_irq (Results 1 – 4 of 4) sorted by relevance
323 struct amdgpu_irq_src cp_ecc_error_irq; member
686 if (adev->gfx.cp_ecc_error_irq.funcs) { in amdgpu_gfx_ras_late_init()687 r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); in amdgpu_gfx_ras_late_init()
2147 &adev->gfx.cp_ecc_error_irq); in gfx_v9_0_sw_init()2153 &adev->gfx.cp_ecc_error_irq); in gfx_v9_0_sw_init()3811 amdgpu_irq_put(adev, &adev->gfx.cp_ecc_error_irq, 0); in gfx_v9_0_hw_fini()6842 adev->gfx.cp_ecc_error_irq.num_types = 2; /*C5 ECC error and C9 FUE error*/ in gfx_v9_0_set_irq_funcs()6843 adev->gfx.cp_ecc_error_irq.funcs = &gfx_v9_0_cp_ecc_error_irq_funcs; in gfx_v9_0_set_irq_funcs()
1973 &adev->gfx.cp_ecc_error_irq); in gfx_v8_0_sw_init()4919 amdgpu_irq_put(adev, &adev->gfx.cp_ecc_error_irq, 0); in gfx_v8_0_hw_fini()5321 r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); in gfx_v8_0_late_init()7074 adev->gfx.cp_ecc_error_irq.num_types = 1; in gfx_v8_0_set_irq_funcs()7075 adev->gfx.cp_ecc_error_irq.funcs = &gfx_v8_0_cp_ecc_error_irq_funcs; in gfx_v8_0_set_irq_funcs()