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Searched refs:crtc_base (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/radeon/
Drv770.c811 void rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) in rv770_page_flip() argument
830 WREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
831 WREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
833 WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
834 WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
837 (u32)crtc_base); in rv770_page_flip()
839 (u32)crtc_base); in rv770_page_flip()
Drs600.c120 void rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) in rs600_page_flip() argument
139 (u32)crtc_base); in rs600_page_flip()
141 (u32)crtc_base); in rs600_page_flip()
Dradeon_asic.h141 u64 crtc_base, bool async);
252 u64 crtc_base, bool async);
465 void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base,
536 u64 crtc_base, bool async);
Devergreen.c1415 void evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, in evergreen_page_flip() argument
1429 upper_32_bits(crtc_base)); in evergreen_page_flip()
1431 (u32)crtc_base); in evergreen_page_flip()
Dr100.c163 void r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) in r100_page_flip() argument
168 u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK; in r100_page_flip()
Dradeon.h2023 void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base, bool async);
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_mode.h280 int crtc_id, u64 crtc_base, bool async);
Ddce_v8_0.c185 int crtc_id, u64 crtc_base, bool async) in dce_v8_0_page_flip() argument
198 upper_32_bits(crtc_base)); in dce_v8_0_page_flip()
201 lower_32_bits(crtc_base)); in dce_v8_0_page_flip()
Ddce_v6_0.c192 int crtc_id, u64 crtc_base, bool async) in dce_v6_0_page_flip() argument
205 upper_32_bits(crtc_base)); in dce_v6_0_page_flip()
207 (u32)crtc_base); in dce_v6_0_page_flip()
Ddce_v10_0.c237 int crtc_id, u64 crtc_base, bool async) in dce_v10_0_page_flip() argument
253 upper_32_bits(crtc_base)); in dce_v10_0_page_flip()
256 lower_32_bits(crtc_base)); in dce_v10_0_page_flip()
Ddce_v11_0.c255 int crtc_id, u64 crtc_base, bool async) in dce_v11_0_page_flip() argument
271 upper_32_bits(crtc_base)); in dce_v11_0_page_flip()
274 lower_32_bits(crtc_base)); in dce_v11_0_page_flip()