/drivers/gpu/drm/nouveau/dispnv50/ |
D | curs507a.c | 82 if (asyh->curs.handle != handle || asyh->curs.offset != offset) { in curs507a_prepare() 83 asyh->curs.handle = handle; in curs507a_prepare() 84 asyh->curs.offset = offset; in curs507a_prepare() 85 asyh->set.curs = asyh->curs.visible; in curs507a_prepare() 93 asyh->curs.visible = false; in curs507a_release() 108 asyh->curs.visible = asyw->state.visible; in curs507a_acquire() 109 if (ret || !asyh->curs.visible) in curs507a_acquire()
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D | head917d.c | 90 NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) | in head917d_curs_set() 91 NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head917d_curs_set() 96 HEAD_SET_OFFSET_CURSOR(i), asyh->curs.offset >> 8); in head917d_curs_set() 98 PUSH_MTHD(push, NV917D, HEAD_SET_CONTEXT_DMA_CURSOR(i), asyh->curs.handle); in head917d_curs_set() 107 case 32: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32; break; in head917d_curs_layout() 108 case 64: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64; break; in head917d_curs_layout() 109 case 128: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W128_H128; break; in head917d_curs_layout() 110 case 256: asyh->curs.layout = NV917D_HEAD_SET_CONTROL_CURSOR_SIZE_W256_H256; break; in head917d_curs_layout()
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D | head.c | 49 if (clr.curs) head->func->curs_clr(head); in nv50_head_flush_clr() 55 if (asyh->set.curs ) head->func->curs_set(head, asyh); in nv50_head_flush_set_wndw() 407 asyh->curs.visible = false; in nv50_head_atomic_check() 421 if (asyh->curs.visible) { in nv50_head_atomic_check() 422 if (memcmp(&armh->curs, &asyh->curs, sizeof(asyh->curs))) in nv50_head_atomic_check() 423 asyh->set.curs = true; in nv50_head_atomic_check() 425 if (armh->curs.visible) { in nv50_head_atomic_check() 426 asyh->clr.curs = true; in nv50_head_atomic_check() 439 asyh->clr.curs = armh->curs.visible; in nv50_head_atomic_check() 442 asyh->set.curs = asyh->curs.visible; in nv50_head_atomic_check() [all …]
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D | head507d.c | 151 NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) | in head507d_curs_set() 152 NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head507d_curs_set() 158 HEAD_SET_OFFSET_CURSOR(i), asyh->curs.offset >> 8); in head507d_curs_set() 167 case 0xcf: asyh->curs.format = NV507D_HEAD_SET_CONTROL_CURSOR_FORMAT_A8R8G8B8; break; in head507d_curs_format() 180 case 32: asyh->curs.layout = NV507D_HEAD_SET_CONTROL_CURSOR_SIZE_W32_H32; break; in head507d_curs_layout() 181 case 64: asyh->curs.layout = NV507D_HEAD_SET_CONTROL_CURSOR_SIZE_W64_H64; break; in head507d_curs_layout() 241 asyh->set.curs = asyh->curs.visible; in head507d_core_set() 257 (asyh->core.visible = asyh->curs.visible)) { in head507d_core_calc()
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D | head827d.c | 60 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) | in head827d_curs_set() 61 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head827d_curs_set() 67 HEAD_SET_OFFSET_CURSOR(i), asyh->curs.offset >> 8); in head827d_curs_set() 69 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_CURSOR(i), asyh->curs.handle); in head827d_curs_set()
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D | headc37d.c | 134 NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) | in headc37d_curs_set() 135 NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in headc37d_curs_set() 148 PUSH_MTHD(push, NVC37D, HEAD_SET_CONTEXT_DMA_CURSOR(i, 0), asyh->curs.handle); in headc37d_curs_set() 149 PUSH_MTHD(push, NVC37D, HEAD_SET_OFFSET_CURSOR(i, 0), asyh->curs.offset >> 8); in headc37d_curs_set() 157 asyh->curs.format = asyw->image.format; in headc37d_curs_format()
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D | atom.h | 89 } curs; member 137 bool curs:1; member
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D | head907d.c | 183 NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) | in head907d_curs_set() 184 NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head907d_curs_set() 189 HEAD_SET_OFFSET_CURSOR(i), asyh->curs.offset >> 8); in head907d_curs_set() 191 PUSH_MTHD(push, NV907D, HEAD_SET_CONTEXT_DMA_CURSOR(i), asyh->curs.handle); in head907d_curs_set()
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D | Kbuild | 49 nouveau-y += dispnv50/curs.o
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/drivers/video/console/ |
D | vgacon.c | 451 int curs, cure; in vgacon_set_cursor_size() local 461 curs = inb_p(vga_video_port_val); in vgacon_set_cursor_size() 465 curs = 0; in vgacon_set_cursor_size() 469 curs = (curs & 0xc0) | from; in vgacon_set_cursor_size() 473 outb_p(curs, vga_video_port_val); in vgacon_set_cursor_size()
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/drivers/net/hamradio/ |
D | baycom_ser_fdx.c | 191 …er12_rx(struct net_device *dev, struct baycom_state *bc, struct timespec64 *ts, unsigned char curs) in ser12_rx() argument 224 if (bc->modem.ser12.last_rxbit != curs) { in ser12_rx() 225 bc->modem.ser12.last_rxbit = curs; in ser12_rx()
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