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Searched refs:dc_link_settings (Results 1 – 25 of 49) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/inc/
Ddc_link_dp.h40 struct dc_link_settings;
58 struct dc_link_settings dp_get_max_link_cap(struct dc_link *link);
62 struct dc_link_settings *known_limit_link_setting,
70 struct dc_link_settings *link_setting,
75 struct dc_link_settings *link_setting);
78 const struct dc_link_settings *link_setting,
184 const struct dc_link_settings *link_setting,
199 enum dp_link_encoding dp_get_link_encoding_format(const struct dc_link_settings *link_settings);
202 enum lttpr_mode dp_decide_lttpr_mode(struct dc_link *link, struct dc_link_settings *link_setting);
223 const struct dc_link_settings *link_settings);
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Dlink_hwss.h49 const struct dc_link_settings *link_settings,
57 const struct dc_link_settings *link_settings);
63 const struct dc_link_settings *link_settings,
Ddc_link_dpia.h33 struct dc_link_settings;
102 const struct dc_link_settings *link_setting,
Dhw_sequencer.h133 struct dc_link_settings *link_settings);
221 const struct dc_link_settings *link_settings);
/drivers/gpu/drm/amd/display/dc/
Ddc_link.h187 struct dc_link_settings reported_link_cap;
188 struct dc_link_settings verified_link_cap;
189 struct dc_link_settings cur_link_settings;
191 struct dc_link_settings preferred_link_setting;
439 const struct dc_link_settings *link_setting);
444 const struct dc_link_settings *link_settings,
452 struct dc_link_settings *link_setting,
469 bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct dc_link_settings *max_link_…
488 struct dc_link_settings *link_setting,
491 struct dc_link_settings *link_setting,
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/drivers/gpu/drm/amd/display/dc/virtual/
Dvirtual_link_encoder.c50 const struct dc_link_settings *link_settings, in virtual_link_encoder_enable_dp_output()
55 const struct dc_link_settings *link_settings, in virtual_link_encoder_enable_dp_mst_output()
64 const struct dc_link_settings *link_settings, in virtual_link_encoder_dp_set_lane_settings()
87 struct dc_link_settings *link_settings) in virtual_link_encoder_get_max_link_cap()
90 struct dc_link_settings max_link_cap = {LANE_COUNT_FOUR, LINK_RATE_HIGH, in virtual_link_encoder_get_max_link_cap()
/drivers/gpu/drm/amd/display/dc/inc/hw/
Dlink_encoder.h40 struct dc_link_settings;
173 const struct dc_link_settings *link_settings,
176 const struct dc_link_settings *link_settings,
184 const struct dc_link_settings *link_settings,
214 struct dc_link_settings *link_settings);
291 const struct dc_link_settings *link_settings,
327 const struct dc_link_settings *link_settings,
/drivers/gpu/drm/amd/display/dc/link/
Dlink_hwss_dio.h42 const struct dc_link_settings *link_settings);
51 const struct dc_link_settings *link_settings,
Dlink_hwss_hpo_dp.c64 const struct dc_link_settings *link_settings, in set_hpo_dp_hblank_min_symbol_width()
163 const struct dc_link_settings *link_settings) in enable_hpo_dp_fpga_link_output()
191 const struct dc_link_settings *link_settings) in enable_hpo_dp_link_output()
247 const struct dc_link_settings *link_settings, in set_hpo_dp_lane_settings()
Dlink_hwss_dio.c116 const struct dc_link_settings *link_settings) in enable_dio_dp_link_output()
155 const struct dc_link_settings *link_settings, in set_dio_dp_lane_settings()
/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_dp.c109 static const struct dc_link_settings fail_safe_link_settings = {
117 struct dc_link_settings *max,
118 struct dc_link_settings *cur,
126 const struct dc_link_settings *link_settings) in get_cr_training_aux_rd_interval()
148 const struct dc_link_settings *link_settings) in get_eq_training_aux_rd_interval()
260 const struct dc_link_settings *link_settings) in decide_cr_training_pattern()
272 const struct dc_link_settings *link_settings) in decide_eq_training_pattern()
304 static uint8_t get_dpcd_link_rate(const struct dc_link_settings *link_settings) in get_dpcd_link_rate()
1452 const struct dc_link_settings *link_setting, in decide_8b_10b_training_settings()
1484 const struct dc_link_settings *link_settings, in decide_128b_132b_training_settings()
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/drivers/gpu/drm/amd/display/dc/dce/
Ddce_link_encoder.h259 const struct dc_link_settings *link_settings,
265 const struct dc_link_settings *link_settings,
282 const struct dc_link_settings *link_settings,
318 struct dc_link_settings *link_settings);
Ddce_link_encoder.c600 const struct dc_link_settings *link_settings) in configure_encoder()
614 const struct dc_link_settings *link_settings) in dce60_configure_encoder()
1121 const struct dc_link_settings *link_settings, in dce110_link_encoder_enable_dp_output()
1160 const struct dc_link_settings *link_settings, in dce110_link_encoder_enable_dp_mst_output()
1200 const struct dc_link_settings *link_settings, in dce60_link_encoder_enable_dp_output()
1239 const struct dc_link_settings *link_settings, in dce60_link_encoder_enable_dp_mst_output()
1325 const struct dc_link_settings *link_settings, in dce110_link_encoder_dp_set_lane_settings()
1666 struct dc_link_settings *link_settings) in dce110_link_encoder_get_max_link_cap()
1669 struct dc_link_settings max_link_cap = {LANE_COUNT_FOUR, LINK_RATE_HIGH, in dce110_link_encoder_get_max_link_cap()
/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_hw_sequencer.h48 struct dc_link_settings *link_settings);
111 const struct dc_link_settings *link_settings);
/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_link_encoder.c172 const struct dc_link_settings *link_settings, in update_cfg_data()
256 const struct dc_link_settings *link_settings, in dcn21_link_encoder_enable_dp_output()
282 const struct dc_link_settings *link_settings, in dcn21_link_encoder_enable_dp_mst_output()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_link_encoder.h552 const struct dc_link_settings *link_settings);
573 const struct dc_link_settings *link_settings,
579 const struct dc_link_settings *link_settings,
590 const struct dc_link_settings *link_settings,
631 struct dc_link_settings *link_settings);
Ddcn10_link_encoder.c489 const struct dc_link_settings *link_settings) in enc1_configure_encoder()
974 const struct dc_link_settings *link_settings, in dcn10_link_encoder_enable_dp_output()
1013 const struct dc_link_settings *link_settings, in dcn10_link_encoder_enable_dp_mst_output()
1101 const struct dc_link_settings *link_settings, in dcn10_link_encoder_dp_set_lane_settings()
1448 struct dc_link_settings *link_settings) in dcn10_link_encoder_get_max_link_cap()
1451 struct dc_link_settings max_link_cap = {LANE_COUNT_FOUR, LINK_RATE_HIGH, in dcn10_link_encoder_get_max_link_cap()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_link_encoder.c214 const struct dc_link_settings *link_settings, in update_cfg_data()
248 const struct dc_link_settings *link_settings, in dcn20_link_encoder_enable_dp_output()
270 struct dc_link_settings *link_settings) in dcn20_link_encoder_get_max_link_cap()
/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_hwseq.h34 struct dc_link_settings *link_settings);
/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_dio_link_encoder.h53 const struct dc_link_settings *link_settings,
Ddcn32_dio_link_encoder.c112 const struct dc_link_settings *link_settings, in dcn32_link_encoder_enable_dp_output()
137 struct dc_link_settings *link_settings) in dcn32_link_encoder_get_max_link_cap()
Ddcn32_hwseq.h83 struct dc_link_settings *link_settings);
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_hpo_dp_link_encoder.h186 const struct dc_link_settings *link_settings,
220 const struct dc_link_settings *link_settings,
Ddcn31_dio_link_encoder.h259 const struct dc_link_settings *link_settings,
267 const struct dc_link_settings *link_settings,
284 struct dc_link_settings *link_settings);
Ddcn31_dio_link_encoder.c456 const struct dc_link_settings *link_settings, in dcn31_link_encoder_enable_dp_output()
503 const struct dc_link_settings *link_settings, in dcn31_link_encoder_enable_dp_mst_output()
640 void dcn31_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_se… in dcn31_link_encoder_get_max_link_cap()

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