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Searched refs:dec_start (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_14nm.c54 u32 dec_start; member
208 u64 dec_start_multiple, dec_start, pll_comp_val; in pll_14nm_dec_frac_calc() local
216 dec_start = div_u64_rem(dec_start_multiple, multiplier, &div_frac_start); in pll_14nm_dec_frac_calc()
218 pconf->dec_start = (u32)dec_start; in pll_14nm_dec_frac_calc()
404 data = pconf->dec_start; in pll_db_commit_14nm()
497 u32 dec_start; in dsi_pll_14nm_vco_recalc_rate() local
500 dec_start = dsi_phy_read(base + REG_DSI_14nm_PHY_PLL_DEC_START); in dsi_pll_14nm_vco_recalc_rate()
501 dec_start &= 0x0ff; in dsi_pll_14nm_vco_recalc_rate()
503 DBG("dec_start = %x", dec_start); in dsi_pll_14nm_vco_recalc_rate()
514 vco_rate = ref_clk * dec_start; in dsi_pll_14nm_vco_recalc_rate()
/drivers/gpu/drm/msm/hdmi/
Dhdmi_phy_8996.c224 u64 dec_start; in pll_calculate() local
248 dec_start = pd.vco_freq; in pll_calculate()
250 do_div(dec_start, pll_divisor); in pll_calculate()
255 frac_start -= dec_start * (1 << 20); in pll_calculate()
275 DBG("DEC_START: %llu", dec_start); in pll_calculate()
294 cfg->com_dec_start_mode0 = dec_start; in pll_calculate()
/drivers/media/pci/ivtv/
Divtv-irq.c168 size = read_dec(itv->vbi.dec_start + 4) + 8; in stream_enc_dma_append()
169 offset = read_dec(itv->vbi.dec_start) + itv->vbi.dec_start; in stream_enc_dma_append()
Divtv-streams.c682 itv->vbi.dec_start = data[0]; in ivtv_setup_v4l2_decode_stream()
685 itv->vbi.dec_start, data[1]); in ivtv_setup_v4l2_decode_stream()
Divtv-driver.h552 u32 dec_start; /* start in decoder memory of VBI re-insertion buffers */ member