Home
last modified time | relevance | path

Searched refs:div_core_shift (Results 1 – 15 of 15) sorted by relevance

/drivers/clk/rockchip/
Dclk-cpu.c89 clksel0 >>= reg_data->div_core_shift[0]; in rockchip_cpuclk_recalc_rate()
164 reg_data->div_core_shift[i]), in rockchip_cpuclk_pre_rate_change()
213 reg_data->div_core_shift[i]), in rockchip_cpuclk_post_rate_change()
Dclk-rk3568.c194 .div_core_shift[0] = 0,
197 .div_core_shift[1] = 8,
200 .div_core_shift[2] = 0,
203 .div_core_shift[3] = 8,
Dclk-rk3188.c149 .div_core_shift[0] = 0,
189 .div_core_shift[0] = 9,
Dclk-rk3368.c158 .div_core_shift[0] = 0,
169 .div_core_shift[0] = 0,
Dclk-rk3036.c106 .div_core_shift[0] = 0,
Dclk-rk3128.c121 .div_core_shift[0] = 0,
Dclk-rk3228.c123 .div_core_shift[0] = 0,
Dclk-rk3399.c295 .div_core_shift[0] = 0,
306 .div_core_shift[0] = 0,
Dclk-rv1108.c110 .div_core_shift[0] = 0,
Dclk-rk3328.c134 .div_core_shift[0] = 0,
Dclk.h398 u8 div_core_shift[ROCKCHIP_CPUCLK_MAX_CORES]; member
Dclk-rk3288.c183 .div_core_shift[0] = 8,
Dclk-rk3308.c113 .div_core_shift[0] = 0,
Dclk-rv1126.c136 .div_core_shift[0] = 0,
Dclk-px30.c128 .div_core_shift[0] = 0,