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Searched refs:div_name (Results 1 – 4 of 4) sorted by relevance

/drivers/clk/tegra/
Dclk-tegra-audio.c65 char *div_name; member
76 .div_name = #_name"_div",\
237 clk = tegra_clk_register_divider(data->div_name, in tegra_audio_clk_init()
242 data->div_name, TEGRA_PERIPH_NO_RESET, in tegra_audio_clk_init()
Dclk-tegra-periph.c828 char *div_name; member
840 .div_name = "pll_p_out" #_num "_div",\
965 clk = tegra_clk_register_divider(data->div_name, "pll_p", in init_pllp()
969 data->div_name, clk_base + data->offset, in init_pllp()
/drivers/clk/zynq/
Dclkc.c179 char *div_name; in zynq_clk_register_periph_clk() local
188 div_name = kasprintf(GFP_KERNEL, "%s_div", clk_name0); in zynq_clk_register_periph_clk()
193 clk_register_divider(NULL, div_name, mux_name, 0, clk_ctrl, 8, 6, in zynq_clk_register_periph_clk()
196 clks[clk0] = clk_register_gate(NULL, clk_name0, div_name, in zynq_clk_register_periph_clk()
199 clks[clk1] = clk_register_gate(NULL, clk_name1, div_name, in zynq_clk_register_periph_clk()
203 kfree(div_name); in zynq_clk_register_periph_clk()
/drivers/clk/
Dclk-stm32f4.c583 const char *div_name[MAX_PLL_DIV]; member
829 if (data->div_name[i]) in stm32f4_rcc_register_pll()
830 clk_register_pll_div(data->div_name[i], in stm32f4_rcc_register_pll()