| /drivers/ata/ |
| D | ahci_dwc.c | 122 u32 dmacr[AHCI_MAX_PORTS]; member
265 u32 port, dmacr, ts; in ahci_dwc_init_dmacr() local
284 dmacr = readl(port_mmio + AHCI_DWC_PORT_DMACR); in ahci_dwc_init_dmacr()
288 dmacr &= ~AHCI_DWC_PORT_TXTS_MASK; in ahci_dwc_init_dmacr()
289 dmacr |= FIELD_PREP(AHCI_DWC_PORT_TXTS_MASK, ts); in ahci_dwc_init_dmacr()
294 dmacr &= ~AHCI_DWC_PORT_RXTS_MASK; in ahci_dwc_init_dmacr()
295 dmacr |= FIELD_PREP(AHCI_DWC_PORT_RXTS_MASK, ts); in ahci_dwc_init_dmacr()
298 writel(dmacr, port_mmio + AHCI_DWC_PORT_DMACR); in ahci_dwc_init_dmacr()
299 dpriv->dmacr[port] = dmacr; in ahci_dwc_init_dmacr()
361 writel(dpriv->dmacr[i], port_mmio + AHCI_DWC_PORT_DMACR); in ahci_dwc_reinit_host()
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| D | sata_dwc_460ex.c | 63 u32 dmacr; /* DMA Control */ member
696 u32 dmacr = sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr); in sata_dwc_clear_dmacr() local
699 dmacr = SATA_DWC_DMACR_RX_CLEAR(dmacr); in sata_dwc_clear_dmacr()
700 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, dmacr); in sata_dwc_clear_dmacr()
702 dmacr = SATA_DWC_DMACR_TX_CLEAR(dmacr); in sata_dwc_clear_dmacr()
703 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, dmacr); in sata_dwc_clear_dmacr()
711 __func__, tag, hsdevp->dma_pending[tag], dmacr); in sata_dwc_clear_dmacr()
712 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, in sata_dwc_clear_dmacr()
736 sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr)); in sata_dwc_dma_xfer_complete()
884 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, in sata_dwc_port_start()
[all …]
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| /drivers/tty/serial/ |
| D | amba-pl011.c | 259 unsigned int dmacr; /* dma control reg */ member
544 u16 dmacr; in pl011_dma_tx_callback() local
551 dmacr = uap->dmacr; in pl011_dma_tx_callback()
552 uap->dmacr = dmacr & ~UART011_TXDMAE; in pl011_dma_tx_callback()
553 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_callback()
564 if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) || in pl011_dma_tx_callback()
667 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_refill()
668 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_refill()
703 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_irq()
704 pl011_write(uap->dmacr, uap, REG_DMACR); in pl011_dma_tx_irq()
[all …]
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| /drivers/dma/xilinx/ |
| D | xilinx_dma.c | 2500 u32 dmacr; in xilinx_vdma_channel_set_config() local
2505 dmacr = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_vdma_channel_set_config()
2514 dmacr &= ~XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2516 dmacr |= XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2517 dmacr &= ~XILINX_DMA_DMACR_MASTER_MASK; in xilinx_vdma_channel_set_config()
2518 dmacr |= cfg->master << XILINX_DMA_DMACR_MASTER_SHIFT; in xilinx_vdma_channel_set_config()
2533 dmacr &= ~XILINX_DMA_DMACR_FRAME_COUNT_MASK; in xilinx_vdma_channel_set_config()
2534 dmacr |= cfg->coalesc << XILINX_DMA_DMACR_FRAME_COUNT_SHIFT; in xilinx_vdma_channel_set_config()
2539 dmacr &= ~XILINX_DMA_DMACR_DELAY_MASK; in xilinx_vdma_channel_set_config()
2540 dmacr |= cfg->delay << XILINX_DMA_DMACR_DELAY_SHIFT; in xilinx_vdma_channel_set_config()
[all …]
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| /drivers/crypto/ux500/cryp/ |
| D | cryp_irqp.h | 89 u32 dmacr; /* Dma control register */ member
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| D | cryp.h | 185 u32 dmacr; member
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| D | cryp.c | 199 CRYP_SET_BITS(&device_data->base->dmacr, in cryp_configure_for_dma()
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| D | cryp_core.c | 374 writel_relaxed(CRYP_DMACR_DEFAULT, &device_data->base->dmacr); in cryp_setup_context()
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| /drivers/spi/ |
| D | spi-pl022.c | 422 u16 dmacr; member
561 writew(chip->dmacr, SSP_DMACR(pl022->virtbase)); in restore_state()
1964 chip->dmacr = 0; in pl022_setup()
1970 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED, in pl022_setup()
1972 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED, in pl022_setup()
1977 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_DISABLED, in pl022_setup()
1979 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_DISABLED, in pl022_setup()
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| D | spi-rockchip.c | 533 u32 dmacr = 0; in rockchip_spi_config() local
578 dmacr |= TF_DMA_EN; in rockchip_spi_config()
580 dmacr |= RF_DMA_EN; in rockchip_spi_config()
598 writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); in rockchip_spi_config()
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| /drivers/video/fbdev/ |
| D | imxfb.c | 186 u_int dmacr; member
682 if (fbi->dmacr) in imxfb_activate_var()
683 writel(fbi->dmacr, fbi->regs + LCDC_DMACR); in imxfb_activate_var()
739 of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr); in imxfb_init_fbinfo()
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| /drivers/dma/ |
| D | mpc512x_dma.c | 95 u32 dmacr; /* DMA control register */ member
1023 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_ERCA); in mpc_dma_probe()
1034 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG | in mpc_dma_probe()
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| /drivers/net/ethernet/intel/i40e/ |
| D | i40e_adminq_cmd.h | 425 __le32 dmacr; member
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