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Searched refs:dpaux (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/tegra/
Ddpaux.c76 static inline u32 tegra_dpaux_readl(struct tegra_dpaux *dpaux, in tegra_dpaux_readl() argument
79 u32 value = readl(dpaux->regs + (offset << 2)); in tegra_dpaux_readl()
81 trace_dpaux_readl(dpaux->dev, offset, value); in tegra_dpaux_readl()
86 static inline void tegra_dpaux_writel(struct tegra_dpaux *dpaux, in tegra_dpaux_writel() argument
89 trace_dpaux_writel(dpaux->dev, offset, value); in tegra_dpaux_writel()
90 writel(value, dpaux->regs + (offset << 2)); in tegra_dpaux_writel()
93 static void tegra_dpaux_write_fifo(struct tegra_dpaux *dpaux, const u8 *buffer, in tegra_dpaux_write_fifo() argument
105 tegra_dpaux_writel(dpaux, value, DPAUX_DP_AUXDATA_WRITE(i)); in tegra_dpaux_write_fifo()
109 static void tegra_dpaux_read_fifo(struct tegra_dpaux *dpaux, u8 *buffer, in tegra_dpaux_read_fifo() argument
118 value = tegra_dpaux_readl(dpaux, DPAUX_DP_AUXDATA_READ(i)); in tegra_dpaux_read_fifo()
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DMakefile22 dpaux.o \
/drivers/gpu/drm/amd/display/dc/core/
Ddc.c4749 cmd.dp_aux_access.aux_control.dpaux.address = payload->address; in dc_process_dmub_aux_transfer_async()
4750 cmd.dp_aux_access.aux_control.dpaux.is_i2c_over_aux = payload->i2c_over_aux; in dc_process_dmub_aux_transfer_async()
4751 cmd.dp_aux_access.aux_control.dpaux.length = payload->length; in dc_process_dmub_aux_transfer_async()
4773 cmd.dp_aux_access.aux_control.dpaux.action = action; in dc_process_dmub_aux_transfer_async()
4776 memcpy(cmd.dp_aux_access.aux_control.dpaux.data, in dc_process_dmub_aux_transfer_async()
/drivers/gpu/drm/amd/display/dmub/inc/
Ddmub_cmd.h1381 struct aux_transaction_parameters dpaux; /**< struct aux_transaction_parameters */ member