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Searched refs:dst_y_per_meta_row_nom_l (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_rq_dlg_calc_32.c251 double dst_y_per_meta_row_nom_l; in dml32_rq_dlg_get_dlg_reg() local
474 …dst_y_per_meta_row_nom_l = get_dst_y_per_meta_row_nom_l(mode_lib, e2e_pipe_param, num_pipes, pipe_… in dml32_rq_dlg_get_dlg_reg()
506 dlg_regs->dst_y_per_meta_row_nom_l = dst_y_per_meta_row_nom_l * dml_pow(2, 2); in dml32_rq_dlg_get_dlg_reg()
581 ASSERT(dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml32_rq_dlg_get_dlg_reg()
/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.c400 DST_Y_PER_META_ROW_NOM_L, &dlg_attr.dst_y_per_meta_row_nom_l); in hubp21_validate_dml_output()
435 if (dlg_attr.dst_y_per_meta_row_nom_l != dml_dlg_attr->dst_y_per_meta_row_nom_l) in hubp21_validate_dml_output()
437 dml_dlg_attr->dst_y_per_meta_row_nom_l, dlg_attr.dst_y_per_meta_row_nom_l); in hubp21_validate_dml_output()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubp.c117 DST_Y_PER_META_ROW_NOM_L, dlg_attr->dst_y_per_meta_row_nom_l); in hubp2_program_deadline()
1182 DST_Y_PER_META_ROW_NOM_L, &dlg_attr->dst_y_per_meta_row_nom_l); in hubp2_read_state_common()
1486 DST_Y_PER_META_ROW_NOM_L, &dlg_attr.dst_y_per_meta_row_nom_l); in hubp2_validate_dml_output()
1521 if (dlg_attr.dst_y_per_meta_row_nom_l != dml_dlg_attr->dst_y_per_meta_row_nom_l) in hubp2_validate_dml_output()
1523 dml_dlg_attr->dst_y_per_meta_row_nom_l, dlg_attr.dst_y_per_meta_row_nom_l); in hubp2_validate_dml_output()
/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_rq_dlg_helpers.c275 dlg_regs->dst_y_per_meta_row_nom_l); in print__dlg_regs_st()
Ddisplay_mode_structs.h645 unsigned int dst_y_per_meta_row_nom_l; member
Ddml1_display_rq_dlg_calc.c1567 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l in dml1_rq_dlg_get_dlg_params()
1569 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml1_rq_dlg_get_dlg_params()
1571 …disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; /* dcc for 4:2:… in dml1_rq_dlg_get_dlg_params()
Ddisplay_mode_vba.h93 dml_get_pipe_attr_decl(dst_y_per_meta_row_nom_l);
Ddisplay_mode_vba.c186 dml_get_pipe_attr_func(dst_y_per_meta_row_nom_l, mode_lib->vba.DST_Y_PER_META_ROW_NOM_L);
/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20v2.c1458 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l in dml20v2_rq_dlg_get_dlg_params()
1460 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml20v2_rq_dlg_get_dlg_params()
1462 …disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; // TODO: dcc fo… in dml20v2_rq_dlg_get_dlg_params()
Ddisplay_rq_dlg_calc_20.c1457 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l in dml20_rq_dlg_get_dlg_params()
1459 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int) dml_pow(2, 17)); in dml20_rq_dlg_get_dlg_params()
1461 …disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; // TODO: dcc fo… in dml20_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c1648 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int)((double)meta_row_height_l in dml_rq_dlg_get_dlg_params()
1650 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params()
1652 …disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; // TODO: dcc fo… in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c1561 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l in dml_rq_dlg_get_dlg_params()
1563 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params()
1565 …disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; // TODO: dcc fo… in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubp.c624 DST_Y_PER_META_ROW_NOM_L, dlg_attr->dst_y_per_meta_row_nom_l); in hubp1_program_deadline()
949 DST_Y_PER_META_ROW_NOM_L, &dlg_attr->dst_y_per_meta_row_nom_l); in hubp1_read_state_common()
Ddcn10_hw_sequencer_debug.c270 dlg_regs->refcyc_per_pte_group_nom_c, dlg_regs->dst_y_per_meta_row_nom_l, in dcn10_get_dlg_states()
Ddcn10_hw_sequencer.c250 dlg_regs->refcyc_per_pte_group_nom_c, dlg_regs->dst_y_per_meta_row_nom_l, in dcn10_log_hubp_states()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.c1497 …disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l / (double) vr… in dml_rq_dlg_get_dlg_params()
1498 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params()
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_rq_dlg_calc_314.c1605 …disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int) ((double) meta_row_height_l / (double) vr… in dml_rq_dlg_get_dlg_params()
1606 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17)); in dml_rq_dlg_get_dlg_params()