| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_helper.c | 131 uint32_t shift, mask, field_value; in set_reg_field_values() local
141 field_value = va_arg(ap, uint32_t); in set_reg_field_values()
144 field_value, mask, shift); in set_reg_field_values()
301 uint8_t shift, uint32_t mask, uint32_t *field_value) in generic_reg_get() argument
304 *field_value = get_reg_field_value_ex(reg_val, mask, shift); in generic_reg_get()
455 uint32_t field_value; in generic_reg_wait() local
484 field_value = get_reg_field_value_ex(reg_val, mask, shift); in generic_reg_wait()
486 if (field_value == condition_value) { in generic_reg_wait()
536 uint32_t shift, mask, *field_value; in generic_indirect_reg_get() local
550 field_value = va_arg(ap, uint32_t *); in generic_indirect_reg_get()
[all …]
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| /drivers/gpu/drm/amd/display/dmub/src/ |
| D | dmub_reg.c | 48 uint32_t shift, mask, field_value; in set_reg_field_values() local
58 field_value = va_arg(ap, uint32_t); in set_reg_field_values()
60 set_reg_field_value_masks(field_value_mask, field_value, mask, in set_reg_field_values()
105 uint32_t mask, uint32_t *field_value) in dmub_reg_get() argument
108 *field_value = get_reg_field_value_ex(reg_val, mask, shift); in dmub_reg_get()
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| D | dmub_reg.h | 122 uint32_t mask, uint32_t *field_value);
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| /drivers/iio/accel/ |
| D | bma400_core.c | 1190 int field_value = 0; in bma400_activity_event_en() local
1197 set_mask_bits(&field_value, BMA400_INT_GEN1_MSK, in bma400_activity_event_en()
1204 set_mask_bits(&field_value, BMA400_INT_GEN2_MSK, in bma400_activity_event_en()
1232 field_value); in bma400_activity_event_en()
1237 field_value); in bma400_activity_event_en()
1241 set_mask_bits(&data->generic_event_en, msk, field_value); in bma400_activity_event_en()
1248 unsigned int mask, field_value; in bma400_tap_event_en() local
1277 set_mask_bits(&field_value, BMA400_S_TAP_MSK, in bma400_tap_event_en()
1282 set_mask_bits(&field_value, BMA400_D_TAP_MSK, in bma400_tap_event_en()
1290 field_value); in bma400_tap_event_en()
[all …]
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| /drivers/sh/intc/ |
| D | access.c | 55 unsigned int field_value, in intc_set_field_from_handle() argument
62 value |= field_value << shift; in intc_set_field_from_handle()
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| D | internals.h | 137 unsigned int field_value,
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| /drivers/iio/adc/ |
| D | ti-ads131e08.c | 304 int field_value, reg; in ads131e08_set_pga_gain() local
306 field_value = ads131e08_pga_gain_to_field_value(st, pga_gain); in ads131e08_set_pga_gain()
307 if (field_value < 0) in ads131e08_set_pga_gain()
308 return field_value; in ads131e08_set_pga_gain()
315 reg |= FIELD_PREP(ADS131E08_CHR_GAIN_MASK, field_value); in ads131e08_set_pga_gain()
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| /drivers/acpi/acpica/ |
| D | exfldio.c | 546 u64 field_value, u32 field_datum_byte_offset) in acpi_ex_write_with_update_rule() argument
556 merged_value = field_value; in acpi_ex_write_with_update_rule()
621 ACPI_FORMAT_UINT64(field_value), in acpi_ex_write_with_update_rule()
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| D | acinterp.h | 136 u64 field_value, u32 field_datum_byte_offset);
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| D | reg_helper.h | 392 uint8_t shift, uint32_t mask, uint32_t *field_value);
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| /drivers/net/ethernet/intel/i40e/ |
| D | i40e_adminq_cmd.h | 1912 __le32 field_value; member
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| /drivers/net/ethernet/hisilicon/hns3/ |
| D | hns3_enet.c | 4523 u32 field_value = is_tx ? HNAE3_RING_GL_TX : HNAE3_RING_GL_RX; in hns3_create_ring_chain() local
4549 HNAE3_RING_GL_IDX_S, field_value); in hns3_create_ring_chain()
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