| /drivers/iommu/ |
| D | msm_iommu.c | 559 unsigned int fsr = GET_FSR(base, ctx); in print_ctx_regs() local
562 pr_err("FSR = %08x [%s%s%s%s%s%s%s%s%s%s]\n", fsr, in print_ctx_regs()
563 (fsr & 0x02) ? "TF " : "", in print_ctx_regs()
564 (fsr & 0x04) ? "AFF " : "", in print_ctx_regs()
565 (fsr & 0x08) ? "APF " : "", in print_ctx_regs()
566 (fsr & 0x10) ? "TLBMF " : "", in print_ctx_regs()
567 (fsr & 0x20) ? "HTWDEEF " : "", in print_ctx_regs()
568 (fsr & 0x40) ? "HTWSEEF " : "", in print_ctx_regs()
569 (fsr & 0x80) ? "MHF " : "", in print_ctx_regs()
570 (fsr & 0x10000) ? "SL " : "", in print_ctx_regs()
[all …]
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| /drivers/i2c/busses/ |
| D | i2c-sh7760.c | 117 unsigned long msr, fsr, fier, len; in sh7760_i2c_irq() local
120 fsr = IN32(id, I2CFSR); in sh7760_i2c_irq()
147 fsr = 0; in sh7760_i2c_irq()
163 if (fsr & FSR_RDF) { in sh7760_i2c_irq()
178 fsr &= ~FSR_RDF; in sh7760_i2c_irq()
195 if ((fsr & FSR_TEND) && (msg->len < 1)) { in sh7760_i2c_irq()
204 fsr &= ~FSR_TEND; in sh7760_i2c_irq()
207 if (fsr & FSR_TDFE) { in sh7760_i2c_irq()
232 OUT32(id, I2CFSR, ~fsr); in sh7760_i2c_irq()
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| /drivers/iommu/arm/arm-smmu/ |
| D | arm-smmu-nvidia.c | 197 u32 fsr, fsynr, cbfrsynra; in nvidia_smmu_context_fault_bank() local
202 fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); in nvidia_smmu_context_fault_bank()
203 if (!(fsr & ARM_SMMU_FSR_FAULT)) in nvidia_smmu_context_fault_bank()
212 fsr, iova, fsynr, cbfrsynra, idx); in nvidia_smmu_context_fault_bank()
214 writel_relaxed(fsr, cb_base + ARM_SMMU_CB_FSR); in nvidia_smmu_context_fault_bank()
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| D | qcom_iommu.c | 202 u32 fsr, fsynr; in qcom_iommu_fault() local
205 fsr = iommu_readl(ctx, ARM_SMMU_CB_FSR); in qcom_iommu_fault()
207 if (!(fsr & ARM_SMMU_FSR_FAULT)) in qcom_iommu_fault()
217 fsr, iova, fsynr, ctx->asid); in qcom_iommu_fault()
220 iommu_writel(ctx, ARM_SMMU_CB_FSR, fsr); in qcom_iommu_fault()
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| D | arm-smmu.c | 394 u32 fsr, fsynr, cbfrsynra; in arm_smmu_context_fault() local
402 fsr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSR); in arm_smmu_context_fault()
403 if (!(fsr & ARM_SMMU_FSR_FAULT)) in arm_smmu_context_fault()
416 fsr, iova, fsynr, cbfrsynra, idx); in arm_smmu_context_fault()
418 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_FSR, fsr); in arm_smmu_context_fault()
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| D | arm-smmu-qcom.c | 66 info->fsr = arm_smmu_cb_read(smmu, cfg->cbndx, ARM_SMMU_CB_FSR); in qcom_adreno_smmu_get_fault_info()
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| /drivers/mmc/host/ |
| D | wbsd.c | 404 int i, idx, fsr, fifo; in wbsd_empty_fifo() local
419 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) { in wbsd_empty_fifo()
424 if (fsr & WBSD_FIFO_FULL) in wbsd_empty_fifo()
426 else if (fsr & WBSD_FIFO_FUTHRE) in wbsd_empty_fifo()
469 int i, idx, fsr, fifo; in wbsd_fill_fifo() local
485 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) { in wbsd_fill_fifo()
490 if (fsr & WBSD_FIFO_EMPTY) in wbsd_fill_fifo()
492 else if (fsr & WBSD_FIFO_EMTHRE) in wbsd_fill_fifo()
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| /drivers/mtd/spi-nor/ |
| D | micron-st.c | 331 static int micron_st_nor_read_fsr(struct spi_nor *nor, u8 *fsr) in micron_st_nor_read_fsr() argument
336 struct spi_mem_op op = MICRON_ST_RDFSR_OP(fsr); in micron_st_nor_read_fsr()
352 ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDFSR, fsr, in micron_st_nor_read_fsr()
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| /drivers/video/console/ |
| D | vgacon.c | 976 unsigned char ovr, vde, fsr; in vgacon_adjust_height() local
996 fsr = inb_p(vga_video_port_val); in vgacon_adjust_height()
1002 fsr = (fsr & 0xe0) + (fontheight - 1); /* Font size register */ in vgacon_adjust_height()
1008 outb_p(fsr, vga_video_port_val); in vgacon_adjust_height()
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| /drivers/usb/misc/sisusbvga/ |
| D | sisusb_con.c | 1135 unsigned char ovr, vde, fsr; in sisusbcon_do_font_op() local
1158 sisusb_getidxreg(sisusb, SISCR, 0x09, &fsr); in sisusbcon_do_font_op()
1159 fsr = (fsr & 0xe0) | (fh - 1); in sisusbcon_do_font_op()
1160 sisusb_setidxreg(sisusb, SISCR, 0x09, fsr); in sisusbcon_do_font_op()
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| /drivers/mtd/nand/raw/ |
| D | davinci_nand.c | 322 u32 fsr = davinci_nand_readl(info, NANDFSR_OFFSET); in nand_davinci_correct_4bit() local
324 switch ((fsr >> 8) & 0x0f) { in nand_davinci_correct_4bit()
333 num_errors = 1 + ((fsr >> 16) & 0x03); in nand_davinci_correct_4bit()
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| /drivers/iio/imu/inv_mpu6050/ |
| D | inv_mpu_core.c | 105 .fsr = INV_MPU6050_FSR_2000DPS,
122 .fsr = INV_MPU6050_FSR_2000DPS,
516 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr); in inv_mpu6050_init_config()
704 *val2 = gyro_scale_6050[st->chip_config.fsr]; in inv_mpu6050_read_raw()
769 st->chip_config.fsr = i; in inv_mpu6050_write_gyro_scale()
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| D | inv_mpu_iio.h | 112 unsigned int fsr:2; member
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| /drivers/net/can/ |
| D | xilinx_can.c | 1171 u32 fsr, mask; in xcan_rx_fifo_get_next_frame() local
1178 fsr = priv->read_reg(priv, XCAN_FSR_OFFSET); in xcan_rx_fifo_get_next_frame()
1186 if (!(fsr & mask)) in xcan_rx_fifo_get_next_frame()
1191 XCAN_RXMSG_2_FRAME_OFFSET(fsr & XCAN_2_FSR_RI_MASK); in xcan_rx_fifo_get_next_frame()
1194 XCAN_RXMSG_FRAME_OFFSET(fsr & XCAN_FSR_RI_MASK); in xcan_rx_fifo_get_next_frame()
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| /drivers/pci/controller/ |
| D | pci-ixp4xx.c | 475 static int ixp4xx_pci_abort_handler(unsigned long addr, unsigned int fsr, in ixp4xx_pci_abort_handler() argument
504 if (fsr & (1 << 10)) { in ixp4xx_pci_abort_handler()
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| D | pcie-rcar-host.c | 1146 unsigned int fsr, struct pt_regs *regs) in rcar_pcie_aarch32_abort_handler() argument
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| /drivers/gpu/drm/msm/adreno/ |
| D | a6xx_gpu.c | 1399 if (info->fsr & ARM_SMMU_FSR_TF) in a6xx_fault_handler()
1401 else if (info->fsr & ARM_SMMU_FSR_PF) in a6xx_fault_handler()
1403 else if (info->fsr & ARM_SMMU_FSR_EF) in a6xx_fault_handler()
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| /drivers/video/fbdev/ |
| D | cg14.c | 106 u8 fsr; /* Fault Status Reg */ member
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| /drivers/pci/controller/dwc/ |
| D | pci-imx6.c | 455 unsigned int fsr, struct pt_regs *regs) in imx6q_pcie_abort_handler() argument
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| D | pci-keystone.c | 754 static int ks_pcie_fault(unsigned long addr, unsigned int fsr, in ks_pcie_fault() argument
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