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Searched refs:gated (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/radeon/
Dvce_v2_0.c39 static void vce_v2_0_set_sw_cg(struct radeon_device *rdev, bool gated) in vce_v2_0_set_sw_cg() argument
43 if (gated) { in vce_v2_0_set_sw_cg()
74 static void vce_v2_0_set_dyn_cg(struct radeon_device *rdev, bool gated) in vce_v2_0_set_dyn_cg() argument
80 if (gated) { in vce_v2_0_set_dyn_cg()
99 if (gated) in vce_v2_0_set_dyn_cg()
/drivers/gpu/drm/amd/amdgpu/
Dvce_v2_0.c310 static void vce_v2_0_set_sw_cg(struct amdgpu_device *adev, bool gated) in vce_v2_0_set_sw_cg() argument
314 if (gated) { in vce_v2_0_set_sw_cg()
345 static void vce_v2_0_set_dyn_cg(struct amdgpu_device *adev, bool gated) in vce_v2_0_set_dyn_cg() argument
356 if (gated) { in vce_v2_0_set_dyn_cg()
379 if(gated) in vce_v2_0_set_dyn_cg()
Dvce_v3_0.c169 bool gated) in vce_v3_0_set_vce_sw_clock_gating() argument
181 if (!gated) { in vce_v3_0_set_vce_sw_clock_gating()
Dvce_v4_0.c840 bool gated)
852 if (gated) {
/drivers/video/fbdev/
Dpxa168fb.h279 #define CFG_GATED_ENA(gated) ((gated) << 21) argument
/drivers/clk/bcm/
DKconfig33 bool "Broadcom BCM63xx gated clock support"
/drivers/video/fbdev/mmp/hw/
Dmmp_ctrl.h504 #define CFG_GATED_ENA(gated) ((gated)<<21) argument
/drivers/scsi/aic7xxx/
Daic7xxx.reg586 * addresses 0x00-0x1e are gated to the appropriate channel based on this