Searched refs:gic_irq (Results 1 – 5 of 5) sorted by relevance
| /drivers/pci/controller/ |
| D | pci-xgene-msi.c | 28 int gic_irq; member
379 if (!msi_group->gic_irq) in xgene_msi_hwirq_alloc()
382 irq_set_chained_handler_and_data(msi_group->gic_irq, in xgene_msi_hwirq_alloc()
393 err = irq_set_affinity(msi_group->gic_irq, mask); in xgene_msi_hwirq_alloc()
403 irq_set_chained_handler_and_data(msi_group->gic_irq, in xgene_msi_hwirq_alloc()
420 if (!msi_group->gic_irq) in xgene_msi_hwirq_free()
423 irq_set_chained_handler_and_data(msi_group->gic_irq, NULL, in xgene_msi_hwirq_free()
474 xgene_msi->msi_groups[irq_index].gic_irq = virt_msir; in xgene_msi_probe()
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| D | pcie-iproc-msi.c | 63 int gic_irq; member
479 irq_set_chained_handler_and_data(msi->grps[i].gic_irq, in iproc_msi_irq_free()
491 irq_set_chained_handler_and_data(msi->grps[i].gic_irq, in iproc_msi_irq_setup()
498 ret = irq_set_affinity(msi->grps[i].gic_irq, mask); in iproc_msi_irq_setup()
502 msi->grps[i].gic_irq); in iproc_msi_irq_setup()
610 msi->grps[i].gic_irq = irq; in iproc_msi_init()
651 if (msi->grps[i].gic_irq) in iproc_msi_init()
652 irq_dispose_mapping(msi->grps[i].gic_irq); in iproc_msi_init()
678 if (msi->grps[i].gic_irq) in iproc_msi_exit()
679 irq_dispose_mapping(msi->grps[i].gic_irq); in iproc_msi_exit()
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| /drivers/irqchip/ |
| D | irq-ls-scfg-msi.c | 38 unsigned int gic_irq; member
120 if (msi_data->msir[cpu].gic_irq <= 0) { in ls_scfg_msi_set_affinity()
252 msir->gic_irq = virq; in ls_scfg_msi_setup_hwirq()
265 irq_set_chained_handler_and_data(msir->gic_irq, in ls_scfg_msi_setup_hwirq()
271 irq_set_affinity(msir->gic_irq, get_cpu_mask(index)); in ls_scfg_msi_setup_hwirq()
292 if (msir->gic_irq > 0) in ls_scfg_msi_teardown_hwirq()
293 irq_set_chained_handler_and_data(msir->gic_irq, NULL, NULL); in ls_scfg_msi_teardown_hwirq()
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| D | irq-gic.c | 165 static inline unsigned int gic_irq(struct irq_data *d) in gic_irq() function
186 u32 mask = 1 << (gic_irq(d) % 32); in gic_poke_irq()
187 writel_relaxed(mask, gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4); in gic_poke_irq()
192 u32 mask = 1 << (gic_irq(d) % 32); in gic_peek_irq()
193 return !!(readl_relaxed(gic_dist_base(d) + offset + (gic_irq(d) / 32) * 4) & mask); in gic_peek_irq()
223 u32 hwirq = gic_irq(d); in gic_eoi_irq()
233 u32 hwirq = gic_irq(d); in gic_eoimode1_eoi_irq()
297 unsigned int gicirq = gic_irq(d); in gic_set_type()
322 if (cascading_gic_irq(d) || gic_irq(d) < 16) in gic_irq_set_vcpu_affinity()
381 unsigned int gic_irq; in gic_handle_cascade_irq() local
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| D | irq-gic-v3.c | 166 static inline unsigned int gic_irq(struct irq_data *d) in gic_irq() function
500 if (WARN_ON(gic_irq(d) >= 8192)) in gic_irq_nmi_setup()
537 if (WARN_ON(gic_irq(d) >= 8192)) in gic_irq_nmi_teardown()
575 write_gicreg(gic_irq(d), ICC_EOIR1_EL1); in gic_eoi_irq()
595 if (gic_irq(d) >= 8192 || irqd_is_forwarded_to_vcpu(d)) in gic_eoimode1_eoi_irq()
599 gic_write_dir(gic_irq(d)); in gic_eoimode1_eoi_irq()
607 unsigned int irq = gic_irq(d); in gic_set_type()
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