| /drivers/gpu/drm/amd/display/dc/dcn314/ |
| D | dcn314_optc.c | 55 int h_active = timing->h_addressable + timing->h_border_left + timing->h_border_right; in optc314_set_odm_combine() local
56 int mpcc_hactive = h_active / opp_cnt; in optc314_set_odm_combine()
58 int odm_mem_count = (h_active + 2047) / 2048; in optc314_set_odm_combine()
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| /drivers/staging/media/max96712/ |
| D | max96712.c | 157 const u32 h_active = 1920; in max96712_pattern_enable() local
161 const u32 h_tot = h_active + h_fp + h_sw + h_bp; in max96712_pattern_enable()
184 max96712_write_bulk_value(priv, 0x1060, h_active + h_fp + h_bp, 2); in max96712_pattern_enable()
188 max96712_write_bulk_value(priv, 0x1067, h_active, 2); in max96712_pattern_enable()
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| /drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_optc.c | 50 int h_active = timing->h_addressable + timing->h_border_left + timing->h_border_right; in optc32_set_odm_combine() local
51 int mpcc_hactive = h_active / opp_cnt; in optc32_set_odm_combine()
53 int odm_mem_count = (h_active + 2047) / 2048; in optc32_set_odm_combine()
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| D | dcn32_dpp.c | 67 if (scl_data->viewport.width == scl_data->h_active && in dscl32_calc_lb_num_partitions()
81 if (scl_data->viewport.width == scl_data->h_active && in dscl32_calc_lb_num_partitions()
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| /drivers/gpu/drm/i915/display/ |
| D | intel_audio.c | 526 unsigned int h_active, h_total, hblank_delta, pixel_clk; in calc_hblank_early_prog() local
531 h_active = crtc_state->hw.adjusted_mode.crtc_hdisplay; in calc_hblank_early_prog()
543 h_active, link_clk, lanes, vdsc_bpp, cdclk); in calc_hblank_early_prog()
548 link_clks_available = (h_total - h_active) * link_clk / pixel_clk - 28; in calc_hblank_early_prog()
559 tu_line = div64_u64(h_active * mul_u32_u32(link_clk, fec_coeff), in calc_hblank_early_prog()
565 return h_active - hblank_rise + hblank_delta; in calc_hblank_early_prog()
570 unsigned int h_active, h_total, pixel_clk; in calc_samples_room() local
573 h_active = crtc_state->hw.adjusted_mode.hdisplay; in calc_samples_room()
579 return ((h_total - h_active) * link_clk - 12 * pixel_clk) / in calc_samples_room()
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| D | intel_sdvo_regs.h | 79 u8 h_active; /* lower 8 bits (pixels) */ member
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| /drivers/gpu/drm/amd/display/include/ |
| D | audio_types.h | 38 uint32_t h_active; member
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| /drivers/gpu/drm/amd/display/dc/dcn201/ |
| D | dcn201_dpp.c | 195 if (scl_data->viewport.width != scl_data->h_active && in dpp201_get_optimal_number_of_taps()
201 if (scl_data->viewport.width > scl_data->h_active && in dpp201_get_optimal_number_of_taps()
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| /drivers/video/fbdev/via/ |
| D | chip.h | 128 int h_active; member
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| D | dvi.c | 331 if ((viaparinfo->tmds_setting_info->h_active == 1600) && in dvi_patch_skew_dvp0()
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| D | hw.c | 1516 viaparinfo->tmds_setting_info->h_active = hres; in viafb_update_device_setting()
1521 viaparinfo->tmds_setting_info->h_active = hres; in viafb_update_device_setting()
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | transform.h | 169 int h_active; member
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 1496 sd->h_active /= 2; in dcn20_split_stream_for_odm()
1499 if (sd->recout.x + 16 >= sd->h_active) in dcn20_split_stream_for_odm()
1501 new_width = sd->h_active - sd->recout.x; in dcn20_split_stream_for_odm()
1511 sd->h_active /= 2; in dcn20_split_stream_for_odm()
1515 new_width = sd->recout.width + sd->recout.x - sd->h_active; in dcn20_split_stream_for_odm()
1522 sd->ratios.horz, sd->h_active - sd->recout.x)); in dcn20_split_stream_for_odm()
1524 sd->ratios.horz_c, sd->h_active - sd->recout.x)); in dcn20_split_stream_for_odm()
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| /drivers/gpu/drm/kmb/ |
| D | kmb_dsi.h | 288 u32 h_active; member
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| D | kmb_dsi.c | 567 val = (fg_cfg->h_active * sysclk * 1000) / in mipi_tx_fg_cfg_regs()
606 fg_t_cfg.h_active = wc; in mipi_tx_fg_cfg()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_resource.c | 867 data->recout.width -= data->h_active * split_count - data->recout.x; in calculate_recout()
875 data->recout.width = data->h_active - data->recout.x; in calculate_recout()
1019 ro_lb = data->h_active * split_idx - recout_full_x; in calculate_inits_and_viewports()
1021 ro_lb = data->h_active * split_idx - recout_full_x + data->recout.x; in calculate_inits_and_viewports()
1123 pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable + in resource_build_scaling_params()
1128 pipe_ctx->plane_res.scl_data.h_active /= get_num_odm_splits(pipe_ctx) + 1; in resource_build_scaling_params()
1138 pipe_ctx->plane_res.scl_data.h_active /= get_num_odm_splits(pipe_ctx->top_pipe) + 1; in resource_build_scaling_params()
1252 pipe_ctx->plane_res.scl_data.h_active, in resource_build_scaling_params()
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| /drivers/gpu/drm/gma500/ |
| D | psb_intel_sdvo_regs.h | 68 u8 h_active; /**< lower 8 bits (pixels) */ member
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| D | psb_intel_sdvo.c | 771 dtd->part1.h_active = width & 0xff; in psb_intel_sdvo_get_dtd_from_mode()
802 mode->hdisplay = dtd->part1.h_active; in psb_intel_sdvo_get_mode_from_dtd()
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| /drivers/video/fbdev/ |
| D | smscufx.c | 662 u16 h_total, h_active, h_blank_start, h_blank_end, h_sync_start, h_sync_end; in ufx_set_vid_mode() local
686 h_active = var->xres; in ufx_set_vid_mode()
692 temp = ((h_total - 1) << 16) | (h_active - 1); in ufx_set_vid_mode()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dpp.c | 136 if (scl_data->viewport.width > scl_data->h_active && in dpp1_get_optimal_number_of_taps()
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| D | dcn10_dpp_dscl.c | 664 MPC_WIDTH, scl_data->h_active, in dpp1_dscl_set_scaler_manual_scale()
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_transform_v.c | 234 int overscan_right = data->h_active - data->recout.x - data->recout.width; in program_overscan()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_audio.c | 165 h_blank = crtc_info->h_total - crtc_info->h_active; in check_audio_bandwidth_hdmi()
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| D | dce_stream_encoder.c | 1156 crtc_info->h_total - crtc_info->h_active; in calc_max_audio_packets_per_line()
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| D | dce_transform.c | 180 int overscan_right = data->h_active in program_overscan()
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