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Searched refs:hop (Results 1 – 19 of 19) sorted by relevance

/drivers/thunderbolt/
Dpath.c16 static void tb_dump_hop(const struct tb_path_hop *hop, const struct tb_regs_hop *regs) in tb_dump_hop() argument
18 const struct tb_port *port = hop->in_port; in tb_dump_hop()
21 hop->in_hop_index, regs->out_port, regs->next_hop); in tb_dump_hop()
38 struct tb_regs_hop hop; in tb_path_find_dst_port() local
48 ret = tb_port_read(port, &hop, TB_CFG_HOPS, 2 * hopid, 2); in tb_path_find_dst_port()
54 if (!hop.enable) in tb_path_find_dst_port()
57 out_port = &sw->ports[hop.out_port]; in tb_path_find_dst_port()
58 hopid = hop.next_hop; in tb_path_find_dst_port()
107 struct tb_regs_hop hop; in tb_path_discover() local
134 ret = tb_port_read(p, &hop, TB_CFG_HOPS, 2 * h, 2); in tb_path_discover()
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Dnhi.c51 int bit = ring->hop; in ring_interrupt_index()
97 index = ring->hop; in ring_interrupt_active()
99 index = ring->hop + ring->nhi->hop_count; in ring_interrupt_active()
144 RING_TYPE(ring), ring->hop, in ring_interrupt_active()
176 io += ring->hop * 16; in ring_desc_base()
184 io += ring->hop * 32; in ring_options_base()
516 if (ring->hop < 0) { in nhi_alloc_hop()
526 ring->hop = i; in nhi_alloc_hop()
531 ring->hop = i; in nhi_alloc_hop()
538 if (ring->hop > 0 && ring->hop < start_hop) { in nhi_alloc_hop()
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Dtunnel.c159 static int tb_pci_init_credits(struct tb_path_hop *hop) in tb_pci_init_credits() argument
161 struct tb_port *port = hop->in_port; in tb_pci_init_credits()
182 hop->initial_credits = credits; in tb_pci_init_credits()
188 struct tb_path_hop *hop; in tb_pci_init_path() local
198 tb_path_for_each_hop(path, hop) { in tb_pci_init_path()
201 ret = tb_pci_init_credits(hop); in tb_pci_init_path()
698 static void tb_dp_init_aux_credits(struct tb_path_hop *hop) in tb_dp_init_aux_credits() argument
700 struct tb_port *port = hop->in_port; in tb_dp_init_aux_credits()
704 hop->initial_credits = sw->min_dp_aux_credits; in tb_dp_init_aux_credits()
706 hop->initial_credits = 1; in tb_dp_init_aux_credits()
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Ddma_test.c158 e2e_tx_hop = ring->hop; in dma_test_start_rings()
195 dt->tx_ring ? dt->tx_ring->hop : -1, in dma_test_start_rings()
197 dt->rx_ring ? dt->rx_ring->hop : -1); in dma_test_start_rings()
221 dt->tx_ring ? dt->tx_ring->hop : -1, in dma_test_stop_rings()
223 dt->rx_ring ? dt->rx_ring->hop : -1); in dma_test_stop_rings()
Dtb.h1104 #define tb_path_for_each_hop(path, hop) \ argument
1105 for ((hop) = &(path)->hops[0]; \
1106 (hop) <= &(path)->hops[(path)->path_length - 1]; (hop)++)
Dswitch.c722 struct tb_regs_hop hop; in tb_init_port() local
724 if (!tb_port_read(port, &hop, TB_CFG_HOPS, 0, 2)) in tb_init_port()
725 port->ctl_credits = hop.initial_credits; in tb_init_port()
/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_dpia.c240 uint32_t hop) in dpcd_set_lt_pattern() argument
246 if (hop != DPRX) in dpcd_set_lt_pattern()
248 ((DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE) * (hop - 1)); in dpcd_set_lt_pattern()
257 if (hop != DPRX) { in dpcd_set_lt_pattern()
260 hop, in dpcd_set_lt_pattern()
293 uint32_t hop) in dpia_training_cr_non_transparent() argument
321 if (hop == repeater_cnt) { in dpia_training_cr_non_transparent()
350 status = dpcd_set_lt_pattern(link, lt_settings->pattern_for_cr, hop); in dpia_training_cr_non_transparent()
360 if (hop == repeater_cnt - 1) { in dpia_training_cr_non_transparent()
372 status = dpcd_set_lane_settings(link, lt_settings, hop); in dpia_training_cr_non_transparent()
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/drivers/gpu/drm/ttm/
Dttm_bo.c118 struct ttm_place *hop) in ttm_bo_handle_move_mem() argument
153 ret = bdev->funcs->move(bo, evict, ctx, mem, hop); in ttm_bo_handle_move_mem()
441 struct ttm_place *hop) in ttm_bo_bounce_temp_buffer() argument
448 hop_placement.placement = hop_placement.busy_placement = hop; in ttm_bo_bounce_temp_buffer()
469 struct ttm_place hop; in ttm_bo_evict() local
472 memset(&hop, 0, sizeof(hop)); in ttm_bo_evict()
503 ret = ttm_bo_handle_move_mem(bo, evict_mem, true, ctx, &hop); in ttm_bo_evict()
507 ret = ttm_bo_bounce_temp_buffer(bo, &evict_mem, ctx, &hop); in ttm_bo_evict()
865 struct ttm_place hop; in ttm_bo_move_buffer() local
883 ret = ttm_bo_handle_move_mem(bo, mem, false, ctx, &hop); in ttm_bo_move_buffer()
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/drivers/misc/habanalabs/common/mmu/
Dmmu_v2_hr.c192 int hop; in hl_mmu_v2_get_last_hop() local
194 for (hop = (mmu_prop->num_hops - 1); hop; hop--) { in hl_mmu_v2_get_last_hop()
195 if (mmu_prop->hop_shifts[hop] == 0) in hl_mmu_v2_get_last_hop()
198 if (page_size <= (1 << mmu_prop->hop_shifts[hop])) in hl_mmu_v2_get_last_hop()
202 return hop; in hl_mmu_v2_get_last_hop()
/drivers/gpu/drm/i915/gem/
Di915_gem_ttm_move.h36 struct ttm_place *hop);
Di915_gem_ttm_move.c552 struct ttm_place *hop) in i915_ttm_move() argument
/drivers/gpu/drm/radeon/
Dradeon_ttm.c197 struct ttm_place *hop) in radeon_bo_move() argument
243 hop->fpfn = 0; in radeon_bo_move()
244 hop->lpfn = 0; in radeon_bo_move()
245 hop->mem_type = TTM_PL_TT; in radeon_bo_move()
246 hop->flags = 0; in radeon_bo_move()
/drivers/gpu/drm/nouveau/
Dnouveau_bo.c990 struct ttm_place *hop) in nouveau_bo_move() argument
1046 hop->fpfn = 0; in nouveau_bo_move()
1047 hop->lpfn = 0; in nouveau_bo_move()
1048 hop->mem_type = TTM_PL_TT; in nouveau_bo_move()
1049 hop->flags = 0; in nouveau_bo_move()
/drivers/net/
Dthunderbolt.c389 net->rx_ring.ring->hop, in tbnet_tear_down()
391 net->tx_ring.ring->hop); in tbnet_tear_down()
640 net->rx_ring.ring->hop, in tbnet_connected_work()
642 net->tx_ring.ring->hop); in tbnet_connected_work()
913 net->tx_ring.ring->hop, sof_mask, in tbnet_open()
/drivers/gpu/drm/qxl/
Dqxl_ttm.c141 struct ttm_place *hop) in qxl_bo_move() argument
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ttm.c463 struct ttm_place *hop) in amdgpu_bo_move() argument
533 hop->fpfn = 0; in amdgpu_bo_move()
534 hop->lpfn = 0; in amdgpu_bo_move()
535 hop->mem_type = TTM_PL_TT; in amdgpu_bo_move()
536 hop->flags = TTM_PL_FLAG_TEMPORARY; in amdgpu_bo_move()
/drivers/gpu/drm/vmwgfx/
Dvmwgfx_ttm_buffer.c598 struct ttm_place *hop) in vmw_move() argument
/drivers/gpu/drm/
Ddrm_gem_vram_helper.c926 struct ttm_place *hop) in bo_driver_move() argument
/drivers/net/can/
DKconfig47 in each namespace the CAN GW hop counter is set to zero.