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Searched refs:hwdata (Results 1 – 6 of 6) sorted by relevance

/drivers/clk/
Dclk-si5351.c308 struct si5351_hw_data *hwdata = in si5351_vxco_prepare() local
311 dev_warn(&hwdata->drvdata->client->dev, "VXCO currently unsupported\n"); in si5351_vxco_prepare()
387 struct si5351_hw_data *hwdata = in si5351_pll_get_parent() local
389 u8 mask = (hwdata->num == 0) ? SI5351_PLLA_SOURCE : SI5351_PLLB_SOURCE; in si5351_pll_get_parent()
392 val = si5351_reg_read(hwdata->drvdata, SI5351_PLL_INPUT_SOURCE); in si5351_pll_get_parent()
399 struct si5351_hw_data *hwdata = in si5351_pll_set_parent() local
402 if (hwdata->drvdata->variant != SI5351_VARIANT_C && in si5351_pll_set_parent()
409 return _si5351_pll_reparent(hwdata->drvdata, hwdata->num, in si5351_pll_set_parent()
417 struct si5351_hw_data *hwdata = in si5351_pll_recalc_rate() local
419 u8 reg = (hwdata->num == 0) ? SI5351_PLLA_PARAMETERS : in si5351_pll_recalc_rate()
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Dclk-versaclock5.c432 struct vc5_hw_data *hwdata = container_of(hw, struct vc5_hw_data, hw); in vc5_pll_recalc_rate() local
433 struct vc5_driver_data *vc5 = hwdata->vc5; in vc5_pll_recalc_rate()
449 struct vc5_hw_data *hwdata = container_of(hw, struct vc5_hw_data, hw); in vc5_pll_round_rate() local
465 hwdata->div_int = div_int; in vc5_pll_round_rate()
466 hwdata->div_frc = (u32)div_frc; in vc5_pll_round_rate()
474 struct vc5_hw_data *hwdata = container_of(hw, struct vc5_hw_data, hw); in vc5_pll_set_rate() local
475 struct vc5_driver_data *vc5 = hwdata->vc5; in vc5_pll_set_rate()
478 fb[0] = hwdata->div_int >> 4; in vc5_pll_set_rate()
479 fb[1] = hwdata->div_int << 4; in vc5_pll_set_rate()
480 fb[2] = hwdata->div_frc >> 16; in vc5_pll_set_rate()
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/drivers/gpio/
Dgpio-mxc.c65 const struct mxc_gpio_hwdata *hwdata; member
113 #define GPIO_DR (port->hwdata->dr_reg)
114 #define GPIO_GDIR (port->hwdata->gdir_reg)
115 #define GPIO_PSR (port->hwdata->psr_reg)
116 #define GPIO_ICR1 (port->hwdata->icr1_reg)
117 #define GPIO_ICR2 (port->hwdata->icr2_reg)
118 #define GPIO_IMR (port->hwdata->imr_reg)
119 #define GPIO_ISR (port->hwdata->isr_reg)
120 #define GPIO_EDGE_SEL (port->hwdata->edge_sel_reg)
122 #define GPIO_INT_LOW_LEV (port->hwdata->low_level)
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/drivers/i2c/busses/
Di2c-imx.c213 const struct imx_i2c_hwdata *hwdata; member
308 return i2c_imx->hwdata->devtype == IMX1_I2C; in is_imx1_i2c()
313 return i2c_imx->hwdata->devtype == VF610_I2C; in is_vf610_i2c()
319 writeb(val, i2c_imx->base + (reg << i2c_imx->hwdata->regshift)); in imx_i2c_write_reg()
325 return readb(i2c_imx->base + (reg << i2c_imx->hwdata->regshift)); in imx_i2c_read_reg()
337 temp = ~i2c_imx->hwdata->i2sr_clr_opcode ^ bits; in i2c_imx_clear_irq()
344 imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN, in i2c_imx_reset_regs()
371 (IMX_I2C_I2DR << i2c_imx->hwdata->regshift); in i2c_imx_dma_request()
390 (IMX_I2C_I2DR << i2c_imx->hwdata->regshift); in i2c_imx_dma_request()
523 void __iomem *addr = i2c_imx->base + (IMX_I2C_I2SR << i2c_imx->hwdata->regshift); in i2c_imx_trx_complete()
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/drivers/clk/renesas/
Drzg2l-cpg.c190 struct sd_hw_data *hwdata = to_sd_hw_data(hw); in rzg2l_cpg_sd_clk_mux_set_parent() local
191 struct rzg2l_cpg_priv *priv = hwdata->priv; in rzg2l_cpg_sd_clk_mux_set_parent()
192 u32 off = GET_REG_OFFSET(hwdata->conf); in rzg2l_cpg_sd_clk_mux_set_parent()
193 u32 shift = GET_SHIFT(hwdata->conf); in rzg2l_cpg_sd_clk_mux_set_parent()
210 bitmask = (GENMASK(GET_WIDTH(hwdata->conf) - 1, 0) << shift) << 16; in rzg2l_cpg_sd_clk_mux_set_parent()
239 struct sd_hw_data *hwdata = to_sd_hw_data(hw); in rzg2l_cpg_sd_clk_mux_get_parent() local
240 struct rzg2l_cpg_priv *priv = hwdata->priv; in rzg2l_cpg_sd_clk_mux_get_parent()
241 u32 val = readl(priv->base + GET_REG_OFFSET(hwdata->conf)); in rzg2l_cpg_sd_clk_mux_get_parent()
243 val >>= GET_SHIFT(hwdata->conf); in rzg2l_cpg_sd_clk_mux_get_parent()
244 val &= GENMASK(GET_WIDTH(hwdata->conf) - 1, 0); in rzg2l_cpg_sd_clk_mux_get_parent()
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/drivers/block/mtip32xx/
Dmtip32xx.c2308 u32 hwdata; in hba_setup() local
2309 hwdata = readl(dd->mmio + HOST_HSORG); in hba_setup()
2312 writel(hwdata | in hba_setup()
2335 u32 hwdata; in mtip_detect_product() local
2345 hwdata = readl(dd->mmio + HOST_HSORG); in mtip_detect_product()
2350 if (hwdata & 0x8) { in mtip_detect_product()
2352 rev = (hwdata & HSORG_HWREV) >> 8; in mtip_detect_product()
2353 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; in mtip_detect_product()