Searched refs:initial_offset (Results 1 – 11 of 11) sorted by relevance
204 pps_payload->initial_offset = in drm_dsc_pps_payload_pack()205 cpu_to_be16(dsc_cfg->initial_offset); in drm_dsc_pps_payload_pack()369 vdsc_cfg->initial_offset + in drm_dsc_compute_rc_parameters()398 rbs_min = vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset + in drm_dsc_compute_rc_parameters()
158 u32 initial_offset = m->mux_buf_offset; in vidtv_mux_push_si() local214 nbytes = m->mux_buf_offset - initial_offset; in vidtv_mux_push_si()285 u32 initial_offset = m->mux_buf_offset; in vidtv_mux_packetize_access_units() local318 nbytes = m->mux_buf_offset - initial_offset; in vidtv_mux_packetize_access_units()356 u32 initial_offset = m->mux_buf_offset; in vidtv_mux_pad_with_nulls() local370 nbytes = m->mux_buf_offset - initial_offset; in vidtv_mux_pad_with_nulls()
52 to->initial_offset = from->initial_offset; in copy_pps_fields()77 dsc_cfg->initial_offset = rc->initial_fullness_offset; in copy_rc_to_cfg()
47 u16 initial_offset; member406 rc->initial_offset = 2048; in calculate_rc_params()408 rc->initial_offset = 5632 - DIV_ROUND_UP(((bpp - 10) * 3584), 2); in calculate_rc_params()410 rc->initial_offset = 6144 - DIV_ROUND_UP(((bpp - 8) * 512), 2); in calculate_rc_params()412 rc->initial_offset = 6144; in calculate_rc_params()514 vdsc_cfg->initial_offset = rc_params->initial_offset; in intel_dsc_compute_params()546 (vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset); in intel_dsc_compute_params()809 DSC_INITIAL_OFFSET(vdsc_cfg->initial_offset); in intel_dsc_pps_configure()
280 nd_btt->initial_offset = 0; in nd_btt_version()295 nd_btt->initial_offset = SZ_4K; in nd_btt_version()
34 return offset + nd_btt->initial_offset; in adjust_initial_offset()1690 rawsize = size - nd_btt->initial_offset; in nvdimm_namespace_attach_btt()1694 ARENA_MIN_SIZE + nd_btt->initial_offset); in nvdimm_namespace_attach_btt()
456 int initial_offset; member
321 DC_LOG_DSC("\tinitial_offset %d", pps->initial_offset); in dsc_log_pps()528 reg_vals->pps.initial_offset = 6144; in dsc_init_reg_values()651 INITIAL_OFFSET, reg_vals->pps.initial_offset, in dsc_write_to_registers()
100 data = dsc->initial_offset << 16; in dpu_hw_dsc_config()
1814 dsc->initial_offset = 6144; /* Not bpp 12 */ in dsi_populate_dsc_params()1816 dsc->initial_offset = 2048; /* bpp = 12 */ in dsi_populate_dsc_params()
8124 #define DSC_INITIAL_OFFSET(initial_offset) ((initial_offset) << 16) argument