| /drivers/usb/renesas_usbhs/ |
| D | mod.c | 32 struct usbhs_irq_state *irq_state) in usbhsm_autonomy_irq_vbus() argument
170 int usbhs_status_get_device_state(struct usbhs_irq_state *irq_state) in usbhs_status_get_device_state() argument
172 return (int)irq_state->intsts0 & DVSQ_MASK; in usbhs_status_get_device_state()
175 int usbhs_status_get_ctrl_stage(struct usbhs_irq_state *irq_state) in usbhs_status_get_ctrl_stage() argument
188 return (int)irq_state->intsts0 & CTSQ_MASK; in usbhs_status_get_ctrl_stage()
233 struct usbhs_irq_state irq_state; in usbhs_interrupt() local
235 if (usbhs_status_get_each_irq(priv, &irq_state) < 0) in usbhs_interrupt()
249 usbhs_write(priv, INTSTS0, ~irq_state.intsts0 & INTSTS0_MAGIC); in usbhs_interrupt()
251 usbhs_write(priv, INTSTS1, ~irq_state.intsts1 & INTSTS1_MAGIC); in usbhs_interrupt()
258 if (irq_state.intsts0 & BRDY) in usbhs_interrupt()
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| D | mod.h | 42 struct usbhs_irq_state *irq_state);
46 struct usbhs_irq_state *irq_state);
50 struct usbhs_irq_state *irq_state);
55 struct usbhs_irq_state *irq_state);
64 struct usbhs_irq_state *irq_state);
68 struct usbhs_irq_state *irq_state);
72 struct usbhs_irq_state *irq_state);
76 struct usbhs_irq_state *irq_state);
95 struct usbhs_irq_state *irq_state);
121 int usbhs_status_get_device_state(struct usbhs_irq_state *irq_state);
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| D | fifo.c | 1317 struct usbhs_irq_state *irq_state) in usbhsf_irq_empty() argument
1323 if (!irq_state->bempsts) { in usbhsf_irq_empty()
1328 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts); in usbhsf_irq_empty()
1335 if (!(irq_state->bempsts & (1 << i))) in usbhsf_irq_empty()
1347 struct usbhs_irq_state *irq_state) in usbhsf_irq_ready() argument
1353 if (!irq_state->brdysts) { in usbhsf_irq_ready()
1358 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts); in usbhsf_irq_ready()
1365 if (!(irq_state->brdysts & (1 << i))) in usbhsf_irq_ready()
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| D | mod_gadget.c | 456 struct usbhs_irq_state *irq_state) in usbhsg_irq_dev_state() argument
460 int state = usbhs_status_get_device_state(irq_state); in usbhsg_irq_dev_state()
477 struct usbhs_irq_state *irq_state) in usbhsg_irq_ctrl_stage() argument
485 int stage = usbhs_status_get_ctrl_stage(irq_state); in usbhsg_irq_ctrl_stage()
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| D | mod_host.c | 1311 struct usbhs_irq_state *irq_state) in usbhsh_irq_attch() argument
1339 struct usbhs_irq_state *irq_state) in usbhsh_irq_dtch() argument
1371 struct usbhs_irq_state *irq_state) in usbhsh_irq_setup_ack() argument
1384 struct usbhs_irq_state *irq_state) in usbhsh_irq_setup_err() argument
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| /drivers/gpio/ |
| D | gpio-sifive.c | 37 unsigned long irq_state; member
48 trigger = (chip->irq_state & BIT(offset)) ? chip->trigger[offset] : 0; in sifive_gpio_set_ie()
98 assign_bit(offset, &chip->irq_state, 1); in sifive_gpio_irq_enable()
109 assign_bit(offset, &chip->irq_state, 0); in sifive_gpio_irq_disable()
248 chip->irq_state = 0; in sifive_gpio_probe()
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| /drivers/staging/pi433/ |
| D | pi433_if.c | 81 u8 irq_state[NUM_DIO]; member
126 if (device->irq_state[DIO0] == DIO_PACKET_SENT) { in DIO0_irq_handler()
130 } else if (device->irq_state[DIO0] == DIO_RSSI_DIO0) { in DIO0_irq_handler()
133 } else if (device->irq_state[DIO0] == DIO_PAYLOAD_READY) { in DIO0_irq_handler()
146 if (device->irq_state[DIO1] == DIO_FIFO_NOT_EMPTY_DIO1) { in DIO1_irq_handler()
148 } else if (device->irq_state[DIO1] == DIO_FIFO_LEVEL) { in DIO1_irq_handler()
385 dev->irq_state[DIO0] = DIO_RSSI_DIO0; in pi433_start_rx()
395 dev->irq_state[DIO1] = DIO_FIFO_LEVEL; in pi433_start_rx()
461 dev->irq_state[DIO0] = DIO_PAYLOAD_READY; in pi433_receive()
687 device->irq_state[DIO1] = DIO_FIFO_LEVEL; in pi433_tx_thread()
[all …]
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| /drivers/mmc/host/ |
| D | s3cmci.c | 381 if (host->irq_state != enable) { in s3cmci_enable_irq()
382 host->irq_state = enable; in s3cmci_enable_irq()
403 if (transfer && host->irq_state) { in s3cmci_disable_irq()
404 host->irq_state = false; in s3cmci_disable_irq()
1261 if (!host->irq_state && !host->irq_disabled) { in s3cmci_enable_sdio_irq()
1262 host->irq_state = true; in s3cmci_enable_sdio_irq()
1269 if (!host->irq_enabled && host->irq_state) { in s3cmci_enable_sdio_irq()
1271 host->irq_state = false; in s3cmci_enable_sdio_irq()
1360 seq_printf(seq, "IRQ state = %d\n", host->irq_state); in s3cmci_state_show()
1587 host->irq_state = false; in s3cmci_probe()
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| D | s3cmci.h | 39 bool irq_state; member
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| /drivers/memory/ |
| D | emif.c | 60 unsigned long irq_state; member
72 static unsigned long irq_state; variable
537 spin_lock_irqsave(&emif_lock, irq_state); in handle_temp_alert()
585 spin_unlock_irqrestore(&emif_lock, irq_state); in handle_temp_alert()
642 spin_lock_irqsave(&emif_lock, irq_state); in emif_threaded_isr()
651 spin_unlock_irqrestore(&emif_lock, irq_state); in emif_threaded_isr()
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| /drivers/pcmcia/ |
| D | soc_common.c | 372 if (skt->irq_state != 1 && state->io_irq) { in soc_common_pcmcia_config_skt()
373 skt->irq_state = 1; in soc_common_pcmcia_config_skt()
376 } else if (skt->irq_state == 1 && state->io_irq == 0) { in soc_common_pcmcia_config_skt()
377 skt->irq_state = 0; in soc_common_pcmcia_config_skt()
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| /drivers/uio/ |
| D | uio_hv_generic.c | 79 hv_uio_irqcontrol(struct uio_info *info, s32 irq_state) in hv_uio_irqcontrol() argument
84 dev->channel->inbound.ring_buffer->interrupt_mask = !irq_state; in hv_uio_irqcontrol()
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| /drivers/mtd/nand/raw/ |
| D | stm32_fmc2_nand.c | 258 u8 irq_state; member
415 nfc->irq_state = FMC2_IRQ_SEQ; in stm32_fmc2_nfc_enable_seq_irq()
425 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_seq_irq()
435 nfc->irq_state = FMC2_IRQ_BCH; in stm32_fmc2_nfc_enable_bch_irq()
450 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_bch_irq()
1166 if (nfc->irq_state == FMC2_IRQ_SEQ) in stm32_fmc2_nfc_irq()
1169 else if (nfc->irq_state == FMC2_IRQ_BCH) in stm32_fmc2_nfc_irq()
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| /drivers/scsi/ |
| D | megaraid.h | 935 #define irq_state(adapter) inb_p((adapter)->base + INTR_PORT) macro
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| D | megaraid.c | 1233 while (!((byte = irq_state(adapter)) & INTR_VALID)) in issue_scb_block()
1278 byte = irq_state(adapter); in megaraid_isr_iomapped()
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