Searched refs:ixDIDT_SQ_EDC_CTRL (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | vega10_powertune.c | 502 …{ ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_EN_MASK, DIDT_S…
503 …{ ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_SW_RST_MASK, DIDT_S…
504 …{ ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, DIDT_S…
505 …{ ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_FORCE_STALL_MASK, DIDT_S…
506 …{ ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, DIDT_S…
507 …{ ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS_MASK, DIDT_S…
508 …{ ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, DIDT_S…
509 …{ ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_EN_MASK, DIDT_S…
510 …{ ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_STALL_POLICY_MASK, DIDT_S…
511 …{ ixDIDT_SQ_EDC_CTRL, DIDT_SQ_EDC_CTRL__GC_EDC_LEVEL_COMB_EN_MASK, DIDT_S…
[all …]
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| D | smu7_hwmgr.c | 117 #define ixDIDT_SQ_EDC_CTRL 0x0013 macro
151 ixDIDT_SQ_EDC_CTRL,
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| /drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 7156 #define ixDIDT_SQ_EDC_CTRL … macro
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| D | gc_9_2_1_offset.h | 7406 #define ixDIDT_SQ_EDC_CTRL … macro
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| D | gc_9_4_2_offset.h | 47 #define ixDIDT_SQ_EDC_CTRL … macro
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| D | gc_9_1_offset.h | 7364 #define ixDIDT_SQ_EDC_CTRL … macro
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| D | gc_10_1_0_offset.h | 11224 #define ixDIDT_SQ_EDC_CTRL … macro
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| D | gc_10_3_0_offset.h | 13474 #define ixDIDT_SQ_EDC_CTRL … macro
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