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Searched refs:ixSQ_WAVE_TTMP5 (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h102 #define ixSQ_WAVE_TTMP5 0x0275 macro
Dgfx_7_0_d.h1930 #define ixSQ_WAVE_TTMP5 0x275 macro
Dgfx_7_2_d.h1951 #define ixSQ_WAVE_TTMP5 0x275 macro
Dgfx_8_1_d.h2118 #define ixSQ_WAVE_TTMP5 0x275 macro
Dgfx_8_0_d.h2150 #define ixSQ_WAVE_TTMP5 0x275 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h7116 #define ixSQ_WAVE_TTMP5 … macro
Dgc_9_2_1_offset.h7363 #define ixSQ_WAVE_TTMP5 … macro
Dgc_9_4_2_offset.h7663 #define ixSQ_WAVE_TTMP5 … macro
Dgc_9_1_offset.h7324 #define ixSQ_WAVE_TTMP5 … macro
Dgc_10_1_0_offset.h11181 #define ixSQ_WAVE_TTMP5 … macro
Dgc_11_0_0_offset.h11659 #define ixSQ_WAVE_TTMP5 … macro
Dgc_11_0_3_offset.h12069 #define ixSQ_WAVE_TTMP5 … macro
Dgc_10_3_0_offset.h13434 #define ixSQ_WAVE_TTMP5 … macro