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Searched refs:max_offset (Results 1 – 22 of 22) sorted by relevance

/drivers/staging/media/atomisp/pci/base/circbuf/src/
Dcircbuf.c126 int max_offset; in ia_css_circbuf_extract() local
133 max_offset = ia_css_circbuf_get_offset(cb, cb->desc->start, cb->desc->end); in ia_css_circbuf_extract()
134 max_offset--; in ia_css_circbuf_extract()
147 if (offset > max_offset) { in ia_css_circbuf_extract()
/drivers/staging/qlge/
Dqlge_dbg.c606 u32 max_offset; in qlge_get_mac_protocol_registers() local
613 max_offset = MAC_ADDR_MAX_CAM_WCOUNT; in qlge_get_mac_protocol_registers()
617 max_offset = MAC_ADDR_MAX_CAM_WCOUNT; in qlge_get_mac_protocol_registers()
622 max_offset = MAC_ADDR_MAX_CAM_WCOUNT; in qlge_get_mac_protocol_registers()
626 max_offset = MAC_ADDR_MAX_FC_MAC_WCOUNT; in qlge_get_mac_protocol_registers()
630 max_offset = MAC_ADDR_MAX_MGMT_MAC_WCOUNT; in qlge_get_mac_protocol_registers()
634 max_offset = MAC_ADDR_MAX_MGMT_VLAN_WCOUNT; in qlge_get_mac_protocol_registers()
638 max_offset = MAC_ADDR_MAX_MGMT_V4_WCOUNT; in qlge_get_mac_protocol_registers()
642 max_offset = MAC_ADDR_MAX_MGMT_V6_WCOUNT; in qlge_get_mac_protocol_registers()
646 max_offset = MAC_ADDR_MAX_MGMT_TU_DP_WCOUNT; in qlge_get_mac_protocol_registers()
[all …]
/drivers/gpu/drm/radeon/
Dradeon_object.c276 int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, in radeon_bo_pin_restricted() argument
290 if (max_offset != 0) { in radeon_bo_pin_restricted()
297 WARN_ON_ONCE(max_offset < in radeon_bo_pin_restricted()
313 (!max_offset || max_offset > bo->rdev->mc.visible_vram_size)) in radeon_bo_pin_restricted()
317 bo->placements[i].lpfn = max_offset >> PAGE_SHIFT; in radeon_bo_pin_restricted()
Dradeon_object.h148 u64 max_offset, u64 *gpu_addr);
/drivers/net/wireless/mediatek/mt76/mt7603/
Dinit.c452 int max_offset, cur_offset; in mt7603_init_txpower() local
461 max_offset = 0; in mt7603_init_txpower()
464 max_offset = max(max_offset, cur_offset); in mt7603_init_txpower()
467 target_power += max_offset; in mt7603_init_txpower()
/drivers/gpu/drm/i915/selftests/
Di915_vma.c597 unsigned int n, max_offset; in igt_vma_rotate_remap() local
599 max_offset = max(plane_info[0].src_stride * plane_info[0].height, in igt_vma_rotate_remap()
601 GEM_BUG_ON(max_offset > max_pages); in igt_vma_rotate_remap()
602 max_offset = max_pages - max_offset; in igt_vma_rotate_remap()
613 for_each_prime_number_from(plane_info[0].offset, 0, max_offset) { in igt_vma_rotate_remap()
614 for_each_prime_number_from(plane_info[1].offset, 0, max_offset) { in igt_vma_rotate_remap()
/drivers/net/ethernet/broadcom/bnxt/
Dbnxt_hwrm.c782 u32 max_offset, offset; in hwrm_req_dma_slice() local
787 max_offset = BNXT_HWRM_DMA_SIZE - ctx->allocated; in hwrm_req_dma_slice()
788 offset = max_offset - size; in hwrm_req_dma_slice()
792 if (addr < req_addr + max_offset && req_addr + ctx->req_len <= addr) { in hwrm_req_dma_slice()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_object.c872 u64 min_offset, u64 max_offset) in amdgpu_bo_pin_restricted() argument
881 if (WARN_ON_ONCE(min_offset > max_offset)) in amdgpu_bo_pin_restricted()
910 if (max_offset != 0) { in amdgpu_bo_pin_restricted()
913 WARN_ON_ONCE(max_offset < in amdgpu_bo_pin_restricted()
936 lpfn = max_offset >> PAGE_SHIFT; in amdgpu_bo_pin_restricted()
Damdgpu_object.h304 u64 min_offset, u64 max_offset);
Dgfx_v8_0.c3911 int max_offset) in gfx_v8_0_parse_ind_reg_list() argument
3922 BUG_ON(*offset_count >= max_offset); in gfx_v8_0_parse_ind_reg_list()
/drivers/mtd/
Dftl.c154 loff_t offset, max_offset; in scan_header() local
158 max_offset = (0x100000<part->mbd.mtd->size)?0x100000:part->mbd.mtd->size; in scan_header()
161 (offset + sizeof(header)) < max_offset; in scan_header()
173 if (offset == max_offset) { in scan_header()
/drivers/scsi/
D53c700.c238 __u8 max_offset = (hostdata->chip710 in NCR_700_offset_period_to_sxfer() local
249 if(offset > max_offset) { in NCR_700_offset_period_to_sxfer()
251 offset, max_offset); in NCR_700_offset_period_to_sxfer()
252 offset = max_offset; in NCR_700_offset_period_to_sxfer()
1999 int max_offset = hostdata->chip710 in NCR_700_set_offset() local
2005 if(offset > max_offset) in NCR_700_set_offset()
2006 offset = max_offset; in NCR_700_set_offset()
/drivers/gpio/
Dgpio-sim.c703 unsigned int max_offset = 0; in gpio_sim_make_line_names() local
710 if (line->offset > max_offset) in gpio_sim_make_line_names()
711 max_offset = line->offset; in gpio_sim_make_line_names()
728 *line_names_size = max_offset + 1; in gpio_sim_make_line_names()
735 if (line->name && (line->offset <= max_offset)) in gpio_sim_make_line_names()
/drivers/net/ethernet/chelsio/libcxgb/
Dlibcxgb_ppm.h54 u32 max_offset; member
Dlibcxgb_ppm.c306 hdr->max_offset = htonl(length); in cxgbi_ppm_make_ppod_hdr()
/drivers/media/dvb-frontends/
Dm88ds3103.c384 u32 max_offset = 0; in m88ds3103b_select_mclk() local
404 if (offset_MHz[i] > max_offset) { in m88ds3103b_select_mclk()
405 max_offset = offset_MHz[i]; in m88ds3103b_select_mclk()
/drivers/media/pci/ivtv/
Divtvfb.c181 unsigned long max_offset; member
214 osd->max_offset = oi->display_width * oi->display_height * 4; in ivtvfb_get_osd_coords()
/drivers/pci/
Dpci.c3261 u32 dw0, bei, base, max_offset; in pci_ea_read() local
3304 pci_read_config_dword(dev, ent_offset, &max_offset); in pci_ea_read()
3324 end = start + (max_offset | 0x03); in pci_ea_read()
3327 if (max_offset & PCI_EA_IS_64) { in pci_ea_read()
/drivers/net/wireless/quantenna/qtnfmac/
Dcommands.c272 s->he_obss_pd.max_offset; in qtnf_cmd_send_start_ap()
/drivers/net/wireless/ath/ath11k/
Dmac.c2964 he_obss_pd->max_offset); in ath11k_mac_config_obss_pd()
2982 srg_th = ATH11K_OBSS_PD_MAX_THRESHOLD + he_obss_pd->max_offset; in ath11k_mac_config_obss_pd()
Dwmi.c3376 cmd->obss_max = he_obss_pd->max_offset; in ath11k_wmi_send_obss_spr_cmd()
/drivers/net/usb/
Dr8152.c2776 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX; in rtl8152_features_check() local
2779 skb_transport_offset(skb) > max_offset) in rtl8152_features_check()