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Searched refs:mmDMA0_CORE_RD_RATE_LIM_CFG_0 (Results 1 – 2 of 2) sorted by relevance

/drivers/misc/habanalabs/include/gaudi/asic_reg/
Ddma0_core_regs.h110 #define mmDMA0_CORE_RD_RATE_LIM_CFG_0 0x500150 macro
/drivers/misc/habanalabs/gaudi/
Dgaudi_security.c4701 mask |= 1U << ((mmDMA0_CORE_RD_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()