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Searched refs:mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 (Results 1 – 3 of 3) sorted by relevance

/drivers/misc/habanalabs/include/gaudi/asic_reg/
Ddma0_qm_regs.h352 #define mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 0x5082A0 macro
/drivers/misc/habanalabs/gaudi/
Dgaudi.c2653 WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 + q_off, so_base_ws_lo); in gaudi_init_pci_dma_qman()
2881 WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 + q_off, in gaudi_init_hbm_dma_qman()
Dgaudi_security.c1684 mask |= 1U << ((mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()