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Searched refs:mmIH_RB_BASE_RING1 (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/oss/
Dosssys_4_0_offset.h138 #define mmIH_RB_BASE_RING1 macro
Dosssys_4_0_1_offset.h138 #define mmIH_RB_BASE_RING1 macro
Dosssys_5_0_0_offset.h138 #define mmIH_RB_BASE_RING1 macro
Dosssys_4_2_0_offset.h140 #define mmIH_RB_BASE_RING1 macro
/drivers/gpu/drm/amd/amdgpu/
Dvega10_ih.c66 ih_regs->ih_rb_base = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_RING1); in vega10_ih_init_register_offset()
Dvega20_ih.c69 ih_regs->ih_rb_base = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_RING1); in vega20_ih_init_register_offset()
Dnavi10_ih.c68 ih_regs->ih_rb_base = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_RING1); in navi10_ih_init_register_offset()