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Searched refs:mmUVD_RAS_VCPU_VCODEC_STATUS (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_offset.h992 #define mmUVD_RAS_VCPU_VCODEC_STATUS 0x0057 macro
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v2_5.c1958 reg_value = RREG32_SOC15(VCN, instance, mmUVD_RAS_VCPU_VCODEC_STATUS); in vcn_v2_6_query_poison_by_instance()