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Searched refs:mmUVD_SCRATCH9 (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h60 #define mmUVD_SCRATCH9 … macro
Dvcn_2_5_offset.h433 #define mmUVD_SCRATCH9 … macro
Dvcn_2_0_0_offset.h418 #define mmUVD_SCRATCH9 … macro
Dvcn_3_0_0_offset.h709 #define mmUVD_SCRATCH9 … macro
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v2_0.c146 adev->vcn.inst->external.scratch9 = SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9); in vcn_v2_0_sw_init()
Dvcn_v1_0.c129 SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9); in vcn_v1_0_sw_init()
Dvcn_v2_5.c173 adev->vcn.inst[j].external.scratch9 = SOC15_REG_OFFSET(VCN, j, mmUVD_SCRATCH9); in vcn_v2_5_sw_init()
Dvcn_v3_0.c166 adev->vcn.inst[i].external.scratch9 = SOC15_REG_OFFSET(VCN, i, mmUVD_SCRATCH9); in vcn_v3_0_sw_init()