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Searched refs:mmio_offset (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/i915/gvt/
Dfirmware.c47 u64 mmio_offset; /* offset in the file */ member
92 h->mmio_offset = h->cfg_space_offset + h->cfg_space_size; in expose_firmware_sysfs()
100 p = firmware + h->mmio_offset; in expose_firmware_sysfs()
254 memcpy(firmware->mmio, fw->data + h->mmio_offset, in intel_gvt_load_firmware()
/drivers/gpu/drm/r128/
Dr128_ioc32.c56 unsigned int mmio_offset; member
89 init.mmio_offset = init32.mmio_offset; in compat_r128_init()
Dr128_cce.c469 dev_priv->mmio = drm_legacy_findmap(dev, init->mmio_offset); in r128_do_init_cce()
/drivers/net/wwan/iosm/
Diosm_ipc_mmio.h53 struct mmio_offset { struct
83 struct mmio_offset offset; argument
/drivers/gpu/drm/mga/
Dmga_ioc32.c54 u32 mmio_offset; member
75 init.mmio_offset = init32.mmio_offset; in compat_mga_init()
Dmga_dma.c848 dev_priv->mmio = drm_legacy_findmap(dev, init->mmio_offset); in mga_do_init_dma()
/drivers/gpu/drm/rcar-du/
Drcar_du_crtc.c37 return rcar_du_read(rcdu, rcrtc->mmio_offset + reg); in rcar_du_crtc_read()
44 rcar_du_write(rcdu, rcrtc->mmio_offset + reg, data); in rcar_du_crtc_write()
51 rcar_du_write(rcdu, rcrtc->mmio_offset + reg, in rcar_du_crtc_clr()
52 rcar_du_read(rcdu, rcrtc->mmio_offset + reg) & ~clr); in rcar_du_crtc_clr()
59 rcar_du_write(rcdu, rcrtc->mmio_offset + reg, in rcar_du_crtc_set()
60 rcar_du_read(rcdu, rcrtc->mmio_offset + reg) | set); in rcar_du_crtc_set()
68 rcar_du_write(rcdu, rcrtc->mmio_offset + DSYSR, rcrtc->dsysr); in rcar_du_crtc_dsysr_clr_set()
1266 rcrtc->mmio_offset = mmio_offsets[hwindex]; in rcar_du_crtc_create()
Drcar_du_group.h37 unsigned int mmio_offset; member
Drcar_du_group.c35 return rcar_du_read(rgrp->dev, rgrp->mmio_offset + reg); in rcar_du_group_read()
40 rcar_du_write(rgrp->dev, rgrp->mmio_offset + reg, data); in rcar_du_group_write()
Drcar_du_crtc.h53 unsigned int mmio_offset; member
Drcar_du_kms.c872 rgrp->mmio_offset = mmio_offsets[i]; in rcar_du_modeset_init()
Drcar_du_plane.c325 rcar_du_write(rgrp->dev, rgrp->mmio_offset + index * PLANE_OFF + reg, in rcar_du_plane_write()
/drivers/gpu/drm/i915/
Dintel_device_info.h283 u32 mmio_offset; member
Di915_pci.c548 .display.mmio_offset = VLV_DISPLAY_BASE,
646 .display.mmio_offset = VLV_DISPLAY_BASE,
Di915_reg.h118 #define DISPLAY_MMIO_BASE(dev_priv) (INTEL_INFO(dev_priv)->display.mmio_offset)
/drivers/gpu/drm/i810/
Di810_dma.c340 dev_priv->mmio_map = drm_legacy_findmap(dev, init->mmio_offset); in i810_dma_initialize()
/drivers/gpu/drm/via/
Dvia_dri1.c2794 dev_priv->mmio = drm_legacy_findmap(dev, init->mmio_offset); in via_do_init_map()