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Searched refs:mod_clk (Results 1 – 22 of 22) sorted by relevance

/drivers/gpu/drm/sun4i/
Dsun6i_drc.c18 struct clk *mod_clk; member
53 drc->mod_clk = devm_clk_get(dev, "mod"); in sun6i_drc_bind()
54 if (IS_ERR(drc->mod_clk)) { in sun6i_drc_bind()
56 ret = PTR_ERR(drc->mod_clk); in sun6i_drc_bind()
60 ret = clk_set_rate_exclusive(drc->mod_clk, 300000000); in sun6i_drc_bind()
66 clk_prepare_enable(drc->mod_clk); in sun6i_drc_bind()
82 clk_rate_exclusive_put(drc->mod_clk); in sun6i_drc_unbind()
83 clk_disable_unprepare(drc->mod_clk); in sun6i_drc_unbind()
Dsun4i_backend.c842 backend->mod_clk = devm_clk_get(dev, "mod"); in sun4i_backend_bind()
843 if (IS_ERR(backend->mod_clk)) { in sun4i_backend_bind()
845 ret = PTR_ERR(backend->mod_clk); in sun4i_backend_bind()
849 ret = clk_set_rate_exclusive(backend->mod_clk, 300000000); in sun4i_backend_bind()
855 clk_prepare_enable(backend->mod_clk); in sun4i_backend_bind()
931 clk_rate_exclusive_put(backend->mod_clk); in sun4i_backend_bind()
932 clk_disable_unprepare(backend->mod_clk); in sun4i_backend_bind()
952 clk_rate_exclusive_put(backend->mod_clk); in sun4i_backend_unbind()
953 clk_disable_unprepare(backend->mod_clk); in sun4i_backend_unbind()
Dsun4i_hdmi_enc.c130 clk_set_rate(hdmi->mod_clk, mode->crtc_clock * 1000); in sun4i_hdmi_mode_set()
535 hdmi->mod_clk = devm_clk_get(dev, "mod"); in sun4i_hdmi_bind()
536 if (IS_ERR(hdmi->mod_clk)) { in sun4i_hdmi_bind()
538 ret = PTR_ERR(hdmi->mod_clk); in sun4i_hdmi_bind()
541 clk_prepare_enable(hdmi->mod_clk); in sun4i_hdmi_bind()
666 clk_disable_unprepare(hdmi->mod_clk); in sun4i_hdmi_bind()
682 clk_disable_unprepare(hdmi->mod_clk); in sun4i_hdmi_unbind()
Dsun8i_mixer.c452 mixer->mod_clk = devm_clk_get(dev, "mod"); in sun8i_mixer_bind()
453 if (IS_ERR(mixer->mod_clk)) { in sun8i_mixer_bind()
455 ret = PTR_ERR(mixer->mod_clk); in sun8i_mixer_bind()
465 clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate); in sun8i_mixer_bind()
467 clk_prepare_enable(mixer->mod_clk); in sun8i_mixer_bind()
543 clk_disable_unprepare(mixer->mod_clk); in sun8i_mixer_unbind()
Dsun4i_frontend.c600 frontend->mod_clk = devm_clk_get(dev, "mod"); in sun4i_frontend_bind()
601 if (IS_ERR(frontend->mod_clk)) { in sun4i_frontend_bind()
603 return PTR_ERR(frontend->mod_clk); in sun4i_frontend_bind()
649 clk_set_rate(frontend->mod_clk, 300000000); in sun4i_frontend_runtime_resume()
652 clk_prepare_enable(frontend->mod_clk); in sun4i_frontend_runtime_resume()
675 clk_disable_unprepare(frontend->mod_clk); in sun4i_frontend_runtime_suspend()
Dsun6i_mipi_dsi.c733 clk_prepare_enable(dsi->mod_clk); in sun6i_dsi_encoder_enable()
811 clk_disable_unprepare(dsi->mod_clk); in sun6i_dsi_encoder_disable()
1156 dsi->mod_clk = devm_clk_get(dev, "mod"); in sun6i_dsi_probe()
1157 if (IS_ERR(dsi->mod_clk)) { in sun6i_dsi_probe()
1159 ret = PTR_ERR(dsi->mod_clk); in sun6i_dsi_probe()
1168 clk_set_rate_exclusive(dsi->mod_clk, 297000000); in sun6i_dsi_probe()
1194 clk_rate_exclusive_put(dsi->mod_clk); in sun6i_dsi_probe()
1208 clk_rate_exclusive_put(dsi->mod_clk); in sun6i_dsi_remove()
Dsun6i_mipi_dsi.h24 struct clk *mod_clk; member
Dsun4i_frontend.h127 struct clk *mod_clk; member
Dsun8i_mixer.h185 struct clk *mod_clk; member
Dsun4i_backend.h176 struct clk *mod_clk; member
Dsun4i_hdmi.h258 struct clk *mod_clk; member
Dsun8i_vi_layer.c178 ability = clk_get_rate(mixer->mod_clk); in sun8i_vi_layer_update_coord()
/drivers/staging/media/sunxi/cedrus/
Dcedrus_hw.c176 clk_disable_unprepare(dev->mod_clk); in cedrus_hw_suspend()
203 ret = clk_prepare_enable(dev->mod_clk); in cedrus_hw_resume()
220 clk_disable_unprepare(dev->mod_clk); in cedrus_hw_resume()
274 dev->mod_clk = devm_clk_get(dev->dev, "mod"); in cedrus_hw_probe()
275 if (IS_ERR(dev->mod_clk)) { in cedrus_hw_probe()
278 ret = PTR_ERR(dev->mod_clk); in cedrus_hw_probe()
306 ret = clk_set_rate(dev->mod_clk, variant->mod_rate); in cedrus_hw_probe()
Dcedrus.h195 struct clk *mod_clk; member
/drivers/phy/allwinner/
Dphy-sun6i-mipi-dphy.c119 struct clk *mod_clk; member
134 clk_prepare_enable(dphy->mod_clk); in sun6i_dphy_init()
135 clk_set_rate_exclusive(dphy->mod_clk, 150000000); in sun6i_dphy_init()
254 dphy_clk_rate = clk_get_rate(dphy->mod_clk); in sun6i_dphy_rx_power_on()
376 clk_rate_exclusive_put(dphy->mod_clk); in sun6i_dphy_exit()
377 clk_disable_unprepare(dphy->mod_clk); in sun6i_dphy_exit()
431 dphy->mod_clk = devm_clk_get(&pdev->dev, "mod"); in sun6i_dphy_probe()
432 if (IS_ERR(dphy->mod_clk)) { in sun6i_dphy_probe()
434 return PTR_ERR(dphy->mod_clk); in sun6i_dphy_probe()
/drivers/clk/sunxi-ng/
Dccu-sun8i-de2.c244 struct clk *bus_clk, *mod_clk; in sunxi_de2_clk_probe() local
263 mod_clk = devm_clk_get(&pdev->dev, "mod"); in sunxi_de2_clk_probe()
264 if (IS_ERR(mod_clk)) in sunxi_de2_clk_probe()
265 return dev_err_probe(&pdev->dev, PTR_ERR(mod_clk), in sunxi_de2_clk_probe()
280 ret = clk_prepare_enable(mod_clk); in sunxi_de2_clk_probe()
303 clk_disable_unprepare(mod_clk); in sunxi_de2_clk_probe()
/drivers/thermal/
Dsun8i_thermal.c89 struct clk *mod_clk; member
362 tmdev->mod_clk = devm_clk_get_enabled(&pdev->dev, "mod"); in sun8i_ths_resource_init()
363 if (IS_ERR(tmdev->mod_clk)) in sun8i_ths_resource_init()
364 return PTR_ERR(tmdev->mod_clk); in sun8i_ths_resource_init()
367 ret = clk_set_rate(tmdev->mod_clk, 24000000); in sun8i_ths_resource_init()
/drivers/media/platform/sunxi/sun8i-di/
Dsun8i-di.c838 dev->mod_clk = devm_clk_get(dev->dev, "mod"); in deinterlace_probe()
839 if (IS_ERR(dev->mod_clk)) { in deinterlace_probe()
842 return PTR_ERR(dev->mod_clk); in deinterlace_probe()
927 ret = clk_set_rate_exclusive(dev->mod_clk, 300000000); in deinterlace_runtime_resume()
941 ret = clk_prepare_enable(dev->mod_clk); in deinterlace_runtime_resume()
969 clk_disable_unprepare(dev->mod_clk); in deinterlace_runtime_resume()
973 clk_rate_exclusive_put(dev->mod_clk); in deinterlace_runtime_resume()
985 clk_disable_unprepare(dev->mod_clk); in deinterlace_runtime_suspend()
987 clk_rate_exclusive_put(dev->mod_clk); in deinterlace_runtime_suspend()
Dsun8i-di.h231 struct clk *mod_clk; member
/drivers/media/platform/sunxi/sun8i-rotate/
Dsun8i_rotate.c772 dev->mod_clk = devm_clk_get(dev->dev, "mod"); in rotate_probe()
773 if (IS_ERR(dev->mod_clk)) { in rotate_probe()
776 return PTR_ERR(dev->mod_clk); in rotate_probe()
861 ret = clk_prepare_enable(dev->mod_clk); in rotate_runtime_resume()
878 clk_disable_unprepare(dev->mod_clk); in rotate_runtime_resume()
891 clk_disable_unprepare(dev->mod_clk); in rotate_runtime_suspend()
Dsun8i-rotate.h130 struct clk *mod_clk; member
/drivers/mtd/nand/raw/
Dsunxi_nand.c246 struct clk *mod_clk; member
438 clk_set_rate(nfc->mod_clk, sunxi_nand->clk_rate); in sunxi_nfc_select_chip()
1550 real_clk_rate = clk_round_rate(nfc->mod_clk, sunxi_nand->clk_rate); in sunxi_nfc_setup_interface()
2147 nfc->mod_clk = devm_clk_get(dev, "mod"); in sunxi_nfc_probe()
2148 if (IS_ERR(nfc->mod_clk)) { in sunxi_nfc_probe()
2150 ret = PTR_ERR(nfc->mod_clk); in sunxi_nfc_probe()
2154 ret = clk_prepare_enable(nfc->mod_clk); in sunxi_nfc_probe()
2207 clk_disable_unprepare(nfc->mod_clk); in sunxi_nfc_probe()
2224 clk_disable_unprepare(nfc->mod_clk); in sunxi_nfc_remove()