| /drivers/gpu/drm/msm/ |
| D | msm_gpu.h | 48 int (*get_param)(struct msm_gpu *gpu, struct msm_file_private *ctx,
50 int (*set_param)(struct msm_gpu *gpu, struct msm_file_private *ctx,
52 int (*hw_init)(struct msm_gpu *gpu);
53 int (*pm_suspend)(struct msm_gpu *gpu);
54 int (*pm_resume)(struct msm_gpu *gpu);
55 void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit);
56 void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
57 irqreturn_t (*irq)(struct msm_gpu *irq);
58 struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);
59 void (*recover)(struct msm_gpu *gpu);
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| D | msm_gpu.c | 26 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail()
50 static int disable_pwrrail(struct msm_gpu *gpu) in disable_pwrrail()
59 static int enable_clk(struct msm_gpu *gpu) in enable_clk()
71 static int disable_clk(struct msm_gpu *gpu) in disable_clk()
89 static int enable_axi(struct msm_gpu *gpu) in enable_axi()
94 static int disable_axi(struct msm_gpu *gpu) in disable_axi()
100 int msm_gpu_pm_resume(struct msm_gpu *gpu) in msm_gpu_pm_resume()
126 int msm_gpu_pm_suspend(struct msm_gpu *gpu) in msm_gpu_pm_suspend()
152 void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_file_private *ctx, in msm_gpu_show_fdinfo()
162 int msm_gpu_hw_init(struct msm_gpu *gpu) in msm_gpu_hw_init()
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| D | msm_gpu_devfreq.c | 22 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_target()
49 static unsigned long get_freq(struct msm_gpu *gpu) in get_freq()
57 static void get_raw_dev_status(struct msm_gpu *gpu, in get_raw_dev_status()
92 static void update_average_dev_status(struct msm_gpu *gpu, in update_average_dev_status()
149 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_get_dev_status()
177 static bool has_devfreq(struct msm_gpu *gpu) in has_devfreq()
183 void msm_devfreq_init(struct msm_gpu *gpu) in msm_devfreq_init()
249 void msm_devfreq_cleanup(struct msm_gpu *gpu) in msm_devfreq_cleanup()
261 void msm_devfreq_resume(struct msm_gpu *gpu) in msm_devfreq_resume()
278 void msm_devfreq_suspend(struct msm_gpu *gpu) in msm_devfreq_suspend()
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| D | msm_ringbuffer.h | 44 struct msm_gpu *gpu;
102 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
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| D | msm_gpummu.c | 13 struct msm_gpu *gpu;
93 struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu) in msm_gpummu_new()
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| D | msm_ringbuffer.c | 18 struct msm_gpu *gpu = submit->gpu; in msm_job_run()
56 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, in msm_ringbuffer_new()
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| D | msm_debugfs.c | 36 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show()
56 struct msm_gpu *gpu = priv->gpu; in msm_gpu_release()
71 struct msm_gpu *gpu = priv->gpu; in msm_gpu_open()
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| D | msm_perf.c | 61 struct msm_gpu *gpu = priv->gpu; in refill_buf()
155 struct msm_gpu *gpu = priv->gpu; in perf_open()
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| D | msm_mmu.h | 44 struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu);
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| D | msm_drv.h | 44 struct msm_gpu;
126 struct msm_gpu *gpu;
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| /drivers/gpu/drm/msm/adreno/ |
| D | adreno_gpu.h | 50 int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value);
67 struct msm_gpu *(*init)(struct drm_device *dev);
77 struct msm_gpu base;
292 u64 adreno_private_address_space_size(struct msm_gpu *gpu);
293 int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
295 int adreno_set_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
299 struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu,
301 int adreno_hw_init(struct msm_gpu *gpu);
302 void adreno_recover(struct msm_gpu *gpu);
303 void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, u32 reg);
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| D | a5xx_gpu.h | 52 void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor);
135 int a5xx_power_init(struct msm_gpu *gpu);
136 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu);
138 static inline int spin_usecs(struct msm_gpu *gpu, uint32_t usecs, in spin_usecs()
154 bool a5xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
155 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state);
157 void a5xx_preempt_init(struct msm_gpu *gpu);
158 void a5xx_preempt_hw_init(struct msm_gpu *gpu);
159 void a5xx_preempt_trigger(struct msm_gpu *gpu);
160 void a5xx_preempt_irq(struct msm_gpu *gpu);
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| D | a4xx_gpu.c | 22 static void a4xx_dump(struct msm_gpu *gpu);
23 static bool a4xx_idle(struct msm_gpu *gpu);
25 static void a4xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a4xx_submit()
76 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg()
156 static bool a4xx_me_init(struct msm_gpu *gpu) in a4xx_me_init()
183 static int a4xx_hw_init(struct msm_gpu *gpu) in a4xx_hw_init()
350 static void a4xx_recover(struct msm_gpu *gpu) in a4xx_recover()
371 static void a4xx_destroy(struct msm_gpu *gpu) in a4xx_destroy()
385 static bool a4xx_idle(struct msm_gpu *gpu) in a4xx_idle()
402 static irqreturn_t a4xx_irq(struct msm_gpu *gpu) in a4xx_irq()
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| D | a2xx_gpu.c | 10 static void a2xx_dump(struct msm_gpu *gpu);
11 static bool a2xx_idle(struct msm_gpu *gpu);
13 static void a2xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a2xx_submit()
54 static bool a2xx_me_init(struct msm_gpu *gpu) in a2xx_me_init()
101 static int a2xx_hw_init(struct msm_gpu *gpu) in a2xx_hw_init()
247 static void a2xx_recover(struct msm_gpu *gpu) in a2xx_recover()
268 static void a2xx_destroy(struct msm_gpu *gpu) in a2xx_destroy()
280 static bool a2xx_idle(struct msm_gpu *gpu) in a2xx_idle()
298 static irqreturn_t a2xx_irq(struct msm_gpu *gpu) in a2xx_irq()
429 static void a2xx_dump(struct msm_gpu *gpu) in a2xx_dump()
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| D | a5xx_gpu.c | 17 static void a5xx_dump(struct msm_gpu *gpu);
21 static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_shadow_rptr()
33 void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, in a5xx_flush()
66 static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit_in_rb()
124 static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit()
436 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state) in a5xx_set_hwcg()
466 static int a5xx_me_init(struct msm_gpu *gpu) in a5xx_me_init()
507 static int a5xx_preempt_start(struct msm_gpu *gpu) in a5xx_preempt_start()
570 static int a5xx_ucode_init(struct msm_gpu *gpu) in a5xx_ucode_init()
617 static int a5xx_zap_shader_resume(struct msm_gpu *gpu) in a5xx_zap_shader_resume()
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| D | a5xx_debugfs.c | 14 static void pfp_print(struct msm_gpu *gpu, struct drm_printer *p) in pfp_print()
27 static void me_print(struct msm_gpu *gpu, struct drm_printer *p) in me_print()
40 static void meq_print(struct msm_gpu *gpu, struct drm_printer *p) in meq_print()
53 static void roq_print(struct msm_gpu *gpu, struct drm_printer *p) in roq_print()
76 void (*show)(struct msm_gpu *gpu, struct drm_printer *p) = in show()
97 struct msm_gpu *gpu = priv->gpu; in reset_set()
144 void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) in a5xx_debugfs_init()
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| D | a5xx_preempt.c | 40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
79 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer()
90 void a5xx_preempt_trigger(struct msm_gpu *gpu) in a5xx_preempt_trigger()
157 void a5xx_preempt_irq(struct msm_gpu *gpu) in a5xx_preempt_irq()
193 void a5xx_preempt_hw_init(struct msm_gpu *gpu) in a5xx_preempt_hw_init()
224 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring()
266 void a5xx_preempt_fini(struct msm_gpu *gpu) in a5xx_preempt_fini()
278 void a5xx_preempt_init(struct msm_gpu *gpu) in a5xx_preempt_init()
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| D | a3xx_gpu.c | 28 static void a3xx_dump(struct msm_gpu *gpu);
29 static bool a3xx_idle(struct msm_gpu *gpu);
31 static void a3xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a3xx_submit()
85 static bool a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init()
112 static int a3xx_hw_init(struct msm_gpu *gpu) in a3xx_hw_init()
351 static void a3xx_recover(struct msm_gpu *gpu) in a3xx_recover()
372 static void a3xx_destroy(struct msm_gpu *gpu) in a3xx_destroy()
386 static bool a3xx_idle(struct msm_gpu *gpu) in a3xx_idle()
404 static irqreturn_t a3xx_irq(struct msm_gpu *gpu) in a3xx_irq()
459 static void a3xx_dump(struct msm_gpu *gpu) in a3xx_dump()
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| D | a6xx_gpu.c | 18 static inline bool _a6xx_check_idle(struct msm_gpu *gpu) in _a6xx_check_idle()
36 static bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_idle()
55 static void update_shadow_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_shadow_rptr()
68 static void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_flush()
172 static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a6xx_submit()
591 static void a6xx_set_hwcg(struct msm_gpu *gpu, bool state) in a6xx_set_hwcg()
750 static void a6xx_set_cp_protect(struct msm_gpu *gpu) in a6xx_set_cp_protect()
786 static void a6xx_set_ubwc_config(struct msm_gpu *gpu) in a6xx_set_ubwc_config()
824 static int a6xx_cp_init(struct msm_gpu *gpu) in a6xx_cp_init()
861 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_ucode_check_version()
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| D | a5xx_power.c | 103 static inline uint32_t _get_mvolts(struct msm_gpu *gpu, uint32_t freq) in _get_mvolts()
122 static void a530_lm_setup(struct msm_gpu *gpu) in a530_lm_setup()
175 static void a540_lm_setup(struct msm_gpu *gpu) in a540_lm_setup()
211 static void a5xx_pc_init(struct msm_gpu *gpu) in a5xx_pc_init()
220 static int a5xx_gpmu_init(struct msm_gpu *gpu) in a5xx_gpmu_init()
278 static void a5xx_lm_enable(struct msm_gpu *gpu) in a5xx_lm_enable()
295 int a5xx_power_init(struct msm_gpu *gpu) in a5xx_power_init()
324 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) in a5xx_gpmu_ucode_init()
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| D | adreno_gpu.c | 30 static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname, in zap_shader_load_mdt()
176 int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid) in adreno_zap_shader_load()
200 adreno_iommu_create_address_space(struct msm_gpu *gpu, in adreno_iommu_create_address_space()
235 u64 adreno_private_address_space_size(struct msm_gpu *gpu) in adreno_private_address_space_size()
248 int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx, in adreno_get_param()
320 int adreno_set_param(struct msm_gpu *gpu, struct msm_file_private *ctx, in adreno_set_param()
484 struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, in adreno_fw_create_bo()
503 int adreno_hw_init(struct msm_gpu *gpu) in adreno_hw_init()
540 struct msm_gpu *gpu = &adreno_gpu->base; in get_rptr()
545 struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu) in adreno_active_ring()
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| D | a6xx_gpu.h | 81 void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp,
83 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu);
85 void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
88 struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu);
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| D | a6xx_gpu_state.c | 120 static int a6xx_crashdumper_init(struct msm_gpu *gpu, in a6xx_crashdumper_init()
133 static int a6xx_crashdumper_run(struct msm_gpu *gpu, in a6xx_crashdumper_run()
163 static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset, in debugbus_read()
211 static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1, in vbif_debugbus_read()
235 static void a6xx_get_vbif_debugbus_block(struct msm_gpu *gpu, in a6xx_get_vbif_debugbus_block()
289 static void a6xx_get_debugbus_block(struct msm_gpu *gpu, in a6xx_get_debugbus_block()
325 static void a6xx_get_debugbus(struct msm_gpu *gpu, in a6xx_get_debugbus()
453 static void a6xx_get_dbgahb_cluster(struct msm_gpu *gpu, in a6xx_get_dbgahb_cluster()
499 static void a6xx_get_dbgahb_clusters(struct msm_gpu *gpu, in a6xx_get_dbgahb_clusters()
521 static void a6xx_get_cluster(struct msm_gpu *gpu, in a6xx_get_cluster()
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| D | adreno_device.c | 407 struct msm_gpu *adreno_load_gpu(struct drm_device *dev) in adreno_load_gpu()
411 struct msm_gpu *gpu = NULL; in adreno_load_gpu()
525 struct msm_gpu *gpu; in adreno_bind()
564 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_unbind()
634 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_runtime_resume()
641 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_runtime_suspend()
653 static void suspend_scheduler(struct msm_gpu *gpu) in suspend_scheduler()
674 static void resume_scheduler(struct msm_gpu *gpu) in resume_scheduler()
686 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_system_suspend()
713 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_system_resume()
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| D | a6xx_gmu.c | 21 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_fault()
105 void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp, in a6xx_gmu_set_freq()
166 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu) in a6xx_gmu_get_freq()
882 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_bus_clear_pending_transactions()
918 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_force_off()
942 static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu) in a6xx_gmu_set_initial_freq()
956 static void a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu) in a6xx_gmu_set_initial_bw()
972 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_resume()
1131 struct msm_gpu *gpu = &a6xx_gpu->base.base; in a6xx_gmu_stop()
1339 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_rpmh_votes_init()
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