Home
last modified time | relevance | path

Searched refs:mux_width (Results 1 – 11 of 11) sorted by relevance

/drivers/clk/rockchip/
Dclk-ddr.c20 int mux_width; member
78 val &= GENMASK(ddrclk->mux_width - 1, 0); in rockchip_ddrclk_get_parent()
93 int mux_shift, int mux_width, in rockchip_clk_register_ddrclk() argument
128 ddrclk->mux_width = mux_width; in rockchip_clk_register_ddrclk()
Dclk.h426 int mux_shift, int mux_width,
468 u8 mux_width; member
493 .mux_width = mw, \
514 .mux_width = mw, \
573 .mux_width = mw, \
591 .mux_width = mw, \
610 .mux_width = mw, \
681 .mux_width = mw, \
698 .mux_width = w, \
713 .mux_width = w, \
[all …]
Dclk.c42 int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, in rockchip_clk_register_branch() argument
64 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_branch()
273 frac_mux->mask = BIT(child->mux_width) - 1; in rockchip_clk_register_frac_branch()
456 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
464 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
471 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
503 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
522 list->mux_width, list->mux_flags, in rockchip_clk_register_branches()
557 list->mux_width, list->div_shift, in rockchip_clk_register_branches()
Dclk-half-divider.c162 u8 mux_width, u8 mux_flags, in rockchip_clk_register_halfdiv() argument
183 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_halfdiv()
/drivers/clk/mediatek/
Dclk-mtk.h77 signed char mux_width; member
94 .mux_width = _width, \
130 .mux_width = _width, \
Dclk-mux.h32 u8 mux_width; member
50 .mux_width = _width, \
Dclk-mux.c86 u32 mask = GENMASK(mux->data->mux_width - 1, 0); in mtk_clk_mux_get_parent()
98 u32 mask = GENMASK(mux->data->mux_width - 1, 0); in mtk_clk_mux_set_parent_setclr_lock()
Dclk-cpumux.c80 cpumux->mask = BIT(mux->mux_width) - 1; in mtk_clk_register_cpumux()
Dclk-mtk.c220 mux->mask = BIT(mc->mux_width) - 1; in mtk_clk_register_composite()
/drivers/clk/x86/
Dclk-cgu.h178 u8 mux_width; member
214 .mux_width = _width, \
Dclk-cgu.c87 u8 width = list->mux_width; in lgm_clk_register_mux()