Searched refs:ndiv_frac (Results 1 – 7 of 7) sorted by relevance
| /drivers/clk/bcm/ |
| D | clk-iproc-pll.c | 85 u64 ndiv_int, ndiv_frac, residual; in pll_calc_param() local
100 ndiv_frac = div64_u64((u64)residual, (u64)parent_rate); in pll_calc_param()
103 vco_out->ndiv_frac = ndiv_frac; in pll_calc_param()
107 residual = (u64)vco_out->ndiv_frac * (u64)parent_rate; in pll_calc_param()
357 val = readl(pll->control_base + ctrl->ndiv_frac.offset); in pll_set_rate()
358 val &= ~(bit_mask(ctrl->ndiv_frac.width) << in pll_set_rate()
359 ctrl->ndiv_frac.shift); in pll_set_rate()
360 val |= vco->ndiv_frac << ctrl->ndiv_frac.shift; in pll_set_rate()
362 ctrl->ndiv_frac.offset, val); in pll_set_rate()
402 val = readl(pll->control_base + ctrl->ndiv_frac.offset); in pll_set_rate()
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| D | clk-iproc-armpll.c | 144 unsigned int ndiv_int, ndiv_frac, ndiv; in __get_ndiv() local
157 ndiv_frac = val & IPROC_CLK_PLLARM_NDIV_FRAC_OFFSET_MASK; in __get_ndiv()
167 ndiv_frac = val & IPROC_CLK_PLLARMB_NDIV_FRAC_MASK; in __get_ndiv()
170 ndiv = (ndiv_int << 20) | ndiv_frac; in __get_ndiv()
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| D | clk-sr.c | 42 .ndiv_frac = REG_VAL(0x10, 0, 20),
102 .ndiv_frac = REG_VAL(0x10, 0, 20),
161 .ndiv_frac = REG_VAL(0x10, 0, 20),
196 .ndiv_frac = REG_VAL(0x10, 0, 20),
250 .ndiv_frac = REG_VAL(0x10, 0, 20),
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| D | clk-iproc.h | 87 unsigned int ndiv_frac; member
163 struct iproc_clk_reg_op ndiv_frac; member
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| D | clk-cygnus.c | 55 .ndiv_frac = REG_VAL(0x10, 0, 20),
191 .ndiv_frac = REG_VAL(0x10, 0, 20),
270 .ndiv_frac = REG_VAL(0x8, 10, 20),
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| D | clk-nsp.c | 41 .ndiv_frac = REG_VAL(0x14, 0, 20),
98 .ndiv_frac = REG_VAL(0x4, 0, 20),
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| /drivers/ssb/ |
| D | driver_chipcommon_pmu.c | 181 u32 ndiv_frac; member
187 { .freq = 12000, .xf = 1, .p1div = 3, .p2div = 22, .ndiv_int = 0x9, .ndiv_frac = 0xFFFFEF, },
188 { .freq = 13000, .xf = 2, .p1div = 1, .p2div = 6, .ndiv_int = 0xb, .ndiv_frac = 0x483483, },
189 { .freq = 14400, .xf = 3, .p1div = 1, .p2div = 10, .ndiv_int = 0xa, .ndiv_frac = 0x1C71C7, },
190 { .freq = 15360, .xf = 4, .p1div = 1, .p2div = 5, .ndiv_int = 0xb, .ndiv_frac = 0x755555, },
191 { .freq = 16200, .xf = 5, .p1div = 1, .p2div = 10, .ndiv_int = 0x5, .ndiv_frac = 0x6E9E06, },
192 { .freq = 16800, .xf = 6, .p1div = 1, .p2div = 10, .ndiv_int = 0x5, .ndiv_frac = 0x3CF3CF, },
193 { .freq = 19200, .xf = 7, .p1div = 1, .p2div = 9, .ndiv_int = 0x5, .ndiv_frac = 0x17B425, },
194 { .freq = 19800, .xf = 8, .p1div = 1, .p2div = 11, .ndiv_int = 0x4, .ndiv_frac = 0xA57EB, },
195 { .freq = 20000, .xf = 9, .p1div = 1, .p2div = 11, .ndiv_int = 0x4, .ndiv_frac = 0, },
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