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Searched refs:new_mask (Results 1 – 25 of 27) sorted by relevance

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/drivers/platform/x86/intel/
Dcrystal_cove_charger.c30 u8 new_mask; member
57 if (charger->mask != charger->new_mask) { in crystal_cove_charger_irq_bus_sync_unlock()
58 regmap_write(charger->regmap, MCHGRIRQ_REG, charger->new_mask); in crystal_cove_charger_irq_bus_sync_unlock()
59 charger->mask = charger->new_mask; in crystal_cove_charger_irq_bus_sync_unlock()
69 charger->new_mask &= ~BIT(data->hwirq); in crystal_cove_charger_irq_unmask()
76 charger->new_mask |= BIT(data->hwirq); in crystal_cove_charger_irq_mask()
131 charger->mask = charger->new_mask = BIT(0); in crystal_cove_charger_probe()
/drivers/net/wireless/ath/ath5k/
Ddma.c740 ath5k_hw_set_imr(struct ath5k_hw *ah, enum ath5k_int new_mask) in ath5k_hw_set_imr() argument
760 int_mask = new_mask & AR5K_INT_COMMON; in ath5k_hw_set_imr()
768 if (new_mask & AR5K_INT_FATAL) { in ath5k_hw_set_imr()
775 if (new_mask & AR5K_INT_TIM) in ath5k_hw_set_imr()
778 if (new_mask & AR5K_INT_TIM) in ath5k_hw_set_imr()
780 if (new_mask & AR5K_INT_DTIM) in ath5k_hw_set_imr()
782 if (new_mask & AR5K_INT_DTIM_SYNC) in ath5k_hw_set_imr()
784 if (new_mask & AR5K_INT_BCN_TIMEOUT) in ath5k_hw_set_imr()
786 if (new_mask & AR5K_INT_CAB_TIMEOUT) in ath5k_hw_set_imr()
790 if (new_mask & AR5K_INT_BNR) in ath5k_hw_set_imr()
[all …]
Dath5k.h1517 enum ath5k_int ath5k_hw_set_imr(struct ath5k_hw *ah, enum ath5k_int new_mask);
/drivers/spi/
Dspi-dw.h251 u32 new_mask; in dw_spi_mask_intr() local
253 new_mask = dw_readl(dws, DW_SPI_IMR) & ~mask; in dw_spi_mask_intr()
254 dw_writel(dws, DW_SPI_IMR, new_mask); in dw_spi_mask_intr()
260 u32 new_mask; in dw_spi_umask_intr() local
262 new_mask = dw_readl(dws, DW_SPI_IMR) | mask; in dw_spi_umask_intr()
263 dw_writel(dws, DW_SPI_IMR, new_mask); in dw_spi_umask_intr()
/drivers/infiniband/core/
Dcounters.c15 enum rdma_nl_counter_mask new_mask) in __counter_set_mode() argument
18 if (new_mask & (~ALL_AUTO_MODE_MASKS)) in __counter_set_mode()
25 port_counter->mode.mask = new_mask; in __counter_set_mode()
80 enum rdma_nl_counter_mask new_mask) in auto_mode_init_counter() argument
85 counter->mode.mask = new_mask; in auto_mode_init_counter()
87 if (new_mask & RDMA_COUNTER_MASK_QP_TYPE) in auto_mode_init_counter()
/drivers/net/ethernet/intel/i40e/
Di40e_ethtool.c4295 u64 current_mask, new_mask; in i40e_check_fdir_input_set() local
4344 new_mask = current_mask; in i40e_check_fdir_input_set()
4357 new_mask &= ~I40E_VERIFY_TAG_MASK; in i40e_check_fdir_input_set()
4365 new_mask |= I40E_L3_SRC_MASK; in i40e_check_fdir_input_set()
4367 new_mask &= ~I40E_L3_SRC_MASK; in i40e_check_fdir_input_set()
4373 new_mask |= I40E_L3_DST_MASK; in i40e_check_fdir_input_set()
4375 new_mask &= ~I40E_L3_DST_MASK; in i40e_check_fdir_input_set()
4381 new_mask |= I40E_L4_SRC_MASK; in i40e_check_fdir_input_set()
4383 new_mask &= ~I40E_L4_SRC_MASK; in i40e_check_fdir_input_set()
4389 new_mask |= I40E_L4_DST_MASK; in i40e_check_fdir_input_set()
[all …]
/drivers/net/ethernet/sfc/
Def10_sriov.c685 u32 old_mask, new_mask; in efx_ef10_sriov_set_privilege_mask() local
707 new_mask = old_mask & ~mask; in efx_ef10_sriov_set_privilege_mask()
708 new_mask |= value; in efx_ef10_sriov_set_privilege_mask()
710 if (new_mask == old_mask) in efx_ef10_sriov_set_privilege_mask()
713 new_mask |= MC_CMD_PRIVILEGE_MASK_IN_DO_CHANGE; in efx_ef10_sriov_set_privilege_mask()
716 MCDI_SET_DWORD(pm_inbuf, PRIVILEGE_MASK_IN_NEW_MASK, new_mask); in efx_ef10_sriov_set_privilege_mask()
/drivers/net/wireless/marvell/libertas/
Ddebugfs.c277 int value, freq, new_mask; in lbs_threshold_write() local
286 ret = sscanf(buf, "%d %d %d", &value, &freq, &new_mask); in lbs_threshold_write()
306 if (new_mask) in lbs_threshold_write()
307 new_mask = curr_mask | event_mask; in lbs_threshold_write()
309 new_mask = curr_mask & ~event_mask; in lbs_threshold_write()
316 events->events = cpu_to_le16(new_mask); in lbs_threshold_write()
/drivers/gpu/drm/amd/pm/swsmu/
Dsmu_internal.h90 #define smu_set_pp_feature_mask(smu, new_mask) smu_ppt_funcs(set_pp_feature_mask, 0, smu, new_ma… argument
Dsmu_cmn.h82 uint64_t new_mask);
Dsmu_cmn.c746 uint64_t new_mask) in smu_cmn_set_pp_feature_mask() argument
757 feature_2_enabled = ~feature_mask & new_mask; in smu_cmn_set_pp_feature_mask()
758 feature_2_disabled = feature_mask & ~new_mask; in smu_cmn_set_pp_feature_mask()
/drivers/net/fddi/
Ddefza.c290 unsigned int old_mask, new_mask; in fza_cmd_send() local
296 new_mask = old_mask & ~FZA_MASK_STATE_CHG; in fza_cmd_send()
297 writew_u(new_mask, &fp->regs->int_mask); in fza_cmd_send()
299 fp->int_mask = new_mask; in fza_cmd_send()
1081 unsigned int old_mask, new_mask; in fza_start_xmit() local
1123 new_mask = old_mask & ~FZA_MASK_SMT_TX_POLL; in fza_start_xmit()
1124 writew_u(new_mask, &fp->regs->int_mask); in fza_start_xmit()
1126 fp->int_mask = new_mask; in fza_start_xmit()
/drivers/net/ethernet/brocade/bna/
Dbna_hw_defs.h169 #define bna_intx_enable(bna, new_mask) \ argument
170 writel((new_mask), (bna)->regs.fn_int_mask)
/drivers/net/wireless/quantenna/qtnfmac/
Dcfg80211.c398 u16 new_mask = upd->interface_stypes; in qtnf_update_mgmt_frame_registrations() local
423 if (new_mask == old_mask) in qtnf_update_mgmt_frame_registrations()
432 if (!(new_mask & mask) == !(old_mask & mask)) in qtnf_update_mgmt_frame_registrations()
435 reg = new_mask & mask; in qtnf_update_mgmt_frame_registrations()
443 vif->mgmt_frames_bitmask = new_mask; in qtnf_update_mgmt_frame_registrations()
/drivers/gpu/drm/arm/
Dmalidp_crtc.c425 u32 new_mask = crtc_state->connector_mask; in malidp_crtc_atomic_check() local
427 if ((old_mask ^ new_mask) == in malidp_crtc_atomic_check()
/drivers/gpu/drm/i915/display/
Dskl_watermark.c240 u16 old_mask, new_mask; in icl_sagv_pre_plane_update() local
246 new_mask = old_bw_state->qgv_points_mask | new_bw_state->qgv_points_mask; in icl_sagv_pre_plane_update()
248 if (old_mask == new_mask) in icl_sagv_pre_plane_update()
254 old_mask, new_mask); in icl_sagv_pre_plane_update()
262 icl_pcode_restrict_qgv_points(i915, new_mask); in icl_sagv_pre_plane_update()
272 u16 old_mask, new_mask; in icl_sagv_post_plane_update() local
278 new_mask = new_bw_state->qgv_points_mask; in icl_sagv_post_plane_update()
280 if (old_mask == new_mask) in icl_sagv_post_plane_update()
286 old_mask, new_mask); in icl_sagv_post_plane_update()
294 icl_pcode_restrict_qgv_points(i915, new_mask); in icl_sagv_post_plane_update()
/drivers/infiniband/hw/hfi1/
Dsdma.c896 cpumask_var_t mask, new_mask; in sdma_set_cpu_to_sde_map() local
909 ret = zalloc_cpumask_var(&new_mask, GFP_KERNEL); in sdma_set_cpu_to_sde_map()
932 cpumask_set_cpu(cpu, new_mask); in sdma_set_cpu_to_sde_map()
988 cpumask_set_cpu(cpu, new_mask); in sdma_set_cpu_to_sde_map()
1036 cpumask_copy(&sde->cpu_mask, new_mask); in sdma_set_cpu_to_sde_map()
1041 free_cpumask_var(new_mask); in sdma_set_cpu_to_sde_map()
/drivers/input/keyboard/
Datkbd.c1536 DECLARE_BITMAP(new_mask, ATKBD_KEYMAP_SIZE); in atkbd_set_force_release()
1539 err = bitmap_parselist(buf, new_mask, ATKBD_KEYMAP_SIZE); in atkbd_set_force_release()
1543 memcpy(atkbd->force_release_mask, new_mask, sizeof(atkbd->force_release_mask)); in atkbd_set_force_release()
/drivers/gpu/drm/radeon/
Dkv_dpm.c2207 u32 new_mask = (1 << level); in kv_set_enabled_level() local
2211 new_mask); in kv_set_enabled_level()
2217 u32 i, new_mask = 0; in kv_set_enabled_levels() local
2220 new_mask |= (1 << i); in kv_set_enabled_levels()
2224 new_mask); in kv_set_enabled_levels()
/drivers/net/ethernet/faraday/
Dftgmac100.c1156 unsigned int status, new_mask = FTGMAC100_INT_BAD; in ftgmac100_interrupt() local
1191 new_mask &= ~status; in ftgmac100_interrupt()
1195 iowrite32(new_mask, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_interrupt()
/drivers/scsi/lpfc/
Dlpfc_ct.c3177 int cmdcode, uint32_t new_mask) in lpfc_fdmi_cmd() argument
3229 cmdcode, new_mask, vport->fdmi_port_mask, in lpfc_fdmi_cmd()
3270 if (new_mask) in lpfc_fdmi_cmd()
3271 mask = new_mask; in lpfc_fdmi_cmd()
3330 if (new_mask) in lpfc_fdmi_cmd()
3331 mask = new_mask; in lpfc_fdmi_cmd()
/drivers/gpu/drm/amd/pm/legacy-dpm/
Dkv_dpm.c2479 u32 new_mask = (1 << level); in kv_set_enabled_level() local
2483 new_mask); in kv_set_enabled_level()
2489 u32 i, new_mask = 0; in kv_set_enabled_levels() local
2492 new_mask |= (1 << i); in kv_set_enabled_levels()
2496 new_mask); in kv_set_enabled_levels()
/drivers/ata/
Dsata_mv.c1044 u32 old_mask, new_mask; in mv_set_main_irq_mask() local
1047 new_mask = (old_mask & ~disable_bits) | enable_bits; in mv_set_main_irq_mask()
1048 if (new_mask != old_mask) { in mv_set_main_irq_mask()
1049 hpriv->main_irq_mask = new_mask; in mv_set_main_irq_mask()
1050 mv_write_main_irq_mask(new_mask, hpriv); in mv_set_main_irq_mask()
Dlibata-eh.c2950 unsigned int new_mask = 0; in ata_eh_revalidate_and_attach() local
3039 new_mask |= 1 << dev->devno; in ata_eh_revalidate_and_attach()
3065 if (!(new_mask & (1 << dev->devno))) in ata_eh_revalidate_and_attach()
/drivers/gpu/drm/amd/pm/swsmu/inc/
Damdgpu_smu.h1240 int (*set_pp_feature_mask)(struct smu_context *smu, uint64_t new_mask);

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