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Searched refs:new_val (Results 1 – 25 of 47) sorted by relevance

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/drivers/gpu/drm/i915/gvt/
Dtrace.h276 TP_PROTO(int id, char *reg_name, unsigned int reg, unsigned int new_val,
279 TP_ARGS(id, reg_name, reg, new_val, old_val, changed),
285 __field(unsigned int, new_val)
294 __entry->new_val = new_val;
300 __entry->id, __entry->buf, __entry->reg, __entry->new_val,
348 unsigned int old_val, unsigned int new_val),
350 TP_ARGS(old_id, new_id, action, reg, old_val, new_val),
358 __field(unsigned int, new_val)
367 __entry->new_val = new_val;
373 __entry->old_val, __entry->new_val)
/drivers/net/ethernet/intel/i40e/
Di40e_dcb.c1710 u32 new_val; in i40e_dcb_hw_rx_pb_config() local
1721 new_val = new_pb_cfg->shared_pool_low_wm; in i40e_dcb_hw_rx_pb_config()
1722 if (new_val < old_val) { in i40e_dcb_hw_rx_pb_config()
1725 reg |= (new_val << I40E_PRTRPB_SLW_SLW_SHIFT) & in i40e_dcb_hw_rx_pb_config()
1735 new_val = new_pb_cfg->shared_pool_low_thresh[i]; in i40e_dcb_hw_rx_pb_config()
1736 if (new_val < old_val) { in i40e_dcb_hw_rx_pb_config()
1739 reg |= (new_val << I40E_PRTRPB_SLT_SLT_TCN_SHIFT) & in i40e_dcb_hw_rx_pb_config()
1745 new_val = new_pb_cfg->tc_pool_low_wm[i]; in i40e_dcb_hw_rx_pb_config()
1746 if (new_val < old_val) { in i40e_dcb_hw_rx_pb_config()
1749 reg |= (new_val << I40E_PRTRPB_DLW_DLW_TCN_SHIFT) & in i40e_dcb_hw_rx_pb_config()
[all …]
/drivers/gpu/drm/i915/gt/
Dintel_gt_pm_irq.c36 u32 new_val; in gen6_gt_pm_update_irq() local
42 new_val = gt->pm_imr; in gen6_gt_pm_update_irq()
43 new_val &= ~interrupt_mask; in gen6_gt_pm_update_irq()
44 new_val |= ~enabled_irq_mask & interrupt_mask; in gen6_gt_pm_update_irq()
46 if (new_val != gt->pm_imr) { in gen6_gt_pm_update_irq()
47 gt->pm_imr = new_val; in gen6_gt_pm_update_irq()
/drivers/mfd/
Dintel_pmc_bxt.c110 u32 new_val; in intel_pmc_gcr_update() local
116 new_val = readl(pmc->gcr_mem_base + offset); in intel_pmc_gcr_update()
118 new_val = (new_val & ~mask) | (val & mask); in intel_pmc_gcr_update()
119 writel(new_val, pmc->gcr_mem_base + offset); in intel_pmc_gcr_update()
121 new_val = readl(pmc->gcr_mem_base + offset); in intel_pmc_gcr_update()
125 return (new_val & mask) != (val & mask) ? -EIO : 0; in intel_pmc_gcr_update()
Daat2870-core.c179 u8 old_val, new_val; in aat2870_update() local
188 new_val = (old_val & ~mask) | (val & mask); in aat2870_update()
189 change = old_val != new_val; in aat2870_update()
191 ret = __aat2870_write(aat2870, addr, new_val); in aat2870_update()
Dmax8998.c111 u8 new_val = (val & mask) | (old_val & (~mask)); in max8998_update_reg() local
112 ret = i2c_smbus_write_byte_data(i2c, reg, new_val); in max8998_update_reg()
/drivers/gpio/
Dgpio-it87.c131 u8 new_val = curr_val | mask; in superio_set_mask() local
133 if (curr_val != new_val) in superio_set_mask()
134 superio_outb(new_val, reg); in superio_set_mask()
140 u8 new_val = curr_val & ~mask; in superio_clear_mask() local
142 if (curr_val != new_val) in superio_clear_mask()
143 superio_outb(new_val, reg); in superio_clear_mask()
Dgpio-ath79.c57 u32 old_val, new_val; in ath79_gpio_update_bits() local
60 new_val = (old_val & ~mask) | (bits & mask); in ath79_gpio_update_bits()
62 if (new_val != old_val) in ath79_gpio_update_bits()
63 ath79_gpio_write(ctrl, reg, new_val); in ath79_gpio_update_bits()
65 return new_val != old_val; in ath79_gpio_update_bits()
/drivers/base/regmap/
Dregmap-debugfs.c465 bool new_val, require_sync = false; in regmap_cache_only_write_file() local
468 err = kstrtobool_from_user(user_buf, count, &new_val); in regmap_cache_only_write_file()
479 if (new_val && !map->cache_only) { in regmap_cache_only_write_file()
482 } else if (!new_val && map->cache_only) { in regmap_cache_only_write_file()
486 map->cache_only = new_val; in regmap_cache_only_write_file()
512 bool new_val; in regmap_cache_bypass_write_file() local
515 err = kstrtobool_from_user(user_buf, count, &new_val); in regmap_cache_bypass_write_file()
526 if (new_val && !map->cache_bypass) { in regmap_cache_bypass_write_file()
529 } else if (!new_val && map->cache_bypass) { in regmap_cache_bypass_write_file()
532 map->cache_bypass = new_val; in regmap_cache_bypass_write_file()
/drivers/pinctrl/freescale/
Dpinctrl-imx1-core.c92 u32 new_val; in imx1_write_2bit() local
105 new_val = value & 0x3; /* Make sure value is really 2 bit */ in imx1_write_2bit()
106 new_val <<= offset; in imx1_write_2bit()
107 new_val |= old_val;/* Set new state for pin_id */ in imx1_write_2bit()
109 writel(new_val, reg); in imx1_write_2bit()
119 u32 new_val; in imx1_write_bit() local
125 new_val = value & 0x1; /* Make sure value is really 1 bit */ in imx1_write_bit()
126 new_val <<= offset; in imx1_write_bit()
127 new_val |= old_val;/* Set new state for pin_id */ in imx1_write_bit()
129 writel(new_val, reg); in imx1_write_bit()
/drivers/ata/
Dahci_st.c41 unsigned long old_val, new_val; in st_ahci_configure_oob() local
43 new_val = (0x02 << ST_AHCI_OOBR_CWMIN_SHIFT) | in st_ahci_configure_oob()
50 writel(new_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR); in st_ahci_configure_oob()
51 writel(new_val, mmio + ST_AHCI_OOBR); in st_ahci_configure_oob()
/drivers/net/dsa/mv88e6xxx/
Dserdes.c127 u16 val, new_val; in mv88e6352_serdes_power() local
135 new_val = val & ~BMCR_PDOWN; in mv88e6352_serdes_power()
137 new_val = val | BMCR_PDOWN; in mv88e6352_serdes_power()
139 if (val != new_val) in mv88e6352_serdes_power()
140 err = mv88e6352_serdes_write(chip, MII_BMCR, new_val); in mv88e6352_serdes_power()
700 u16 val, new_val; in mv88e6390_serdes_power_10g() local
710 new_val = val & ~(MDIO_CTRL1_RESET | in mv88e6390_serdes_power_10g()
714 new_val = val | MDIO_CTRL1_LPOWER; in mv88e6390_serdes_power_10g()
716 if (val != new_val) in mv88e6390_serdes_power_10g()
718 MV88E6390_10G_CTRL1, new_val); in mv88e6390_serdes_power_10g()
[all …]
/drivers/regulator/
Dmax8997-regulator.c539 u8 new_val, int *best) in max8997_assess_side_effect() argument
575 if (new_val != (buckx_val[rid])[i]) { in max8997_assess_side_effect()
621 int new_val, new_idx, damage, tmp_val, tmp_idx, tmp_dmg; in max8997_set_voltage_buck() local
647 new_val = max8997_get_voltage_proper_val(desc, min_uV, max_uV); in max8997_set_voltage_buck()
648 if (new_val < 0) in max8997_set_voltage_buck()
649 return new_val; in max8997_set_voltage_buck()
655 damage = max8997_assess_side_effect(rdev, new_val, &new_idx); in max8997_set_voltage_buck()
661 tmp_val = new_val; in max8997_set_voltage_buck()
665 new_val++; in max8997_set_voltage_buck()
666 } while (desc->min + desc->step * new_val <= desc->max); in max8997_set_voltage_buck()
[all …]
/drivers/mmc/host/
Dsdhci-esdhc-imx.c656 u32 new_val = 0; in esdhc_writew_le() local
660 new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_writew_le()
662 new_val |= ESDHC_VENDOR_SPEC_FRC_SDCLK_ON; in esdhc_writew_le()
664 new_val &= ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON; in esdhc_writew_le()
665 writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_writew_le()
666 if (!(new_val & ESDHC_VENDOR_SPEC_FRC_SDCLK_ON)) in esdhc_writew_le()
670 new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_writew_le()
672 new_val |= ESDHC_VENDOR_SPEC_VSELECT; in esdhc_writew_le()
674 new_val &= ~ESDHC_VENDOR_SPEC_VSELECT; in esdhc_writew_le()
675 writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC); in esdhc_writew_le()
[all …]
/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_top.c96 u32 reg_val, new_val; in dpu_hw_setup_clk_force_ctrl() local
113 new_val = reg_val | BIT(bit_off); in dpu_hw_setup_clk_force_ctrl()
115 new_val = reg_val & ~BIT(bit_off); in dpu_hw_setup_clk_force_ctrl()
117 DPU_REG_WRITE(c, reg_off, new_val); in dpu_hw_setup_clk_force_ctrl()
/drivers/xen/xen-pciback/
Dconf_space.c115 static inline u32 merge_value(u32 val, u32 new_val, u32 new_val_mask, in merge_value() argument
120 new_val <<= (offset * 8); in merge_value()
123 new_val >>= (offset * -8); in merge_value()
125 val = (val & ~new_val_mask) | (new_val & new_val_mask); in merge_value()
/drivers/net/
Dmdio.c71 int new_val; in mdio_set_flag() local
76 new_val = old_val | mask; in mdio_set_flag()
78 new_val = old_val & ~mask; in mdio_set_flag()
79 if (old_val == new_val) in mdio_set_flag()
81 return mdio->mdio_write(mdio->dev, prtad, devad, addr, new_val); in mdio_set_flag()
/drivers/iio/light/
Dltr501.c472 int ret, samp_period, new_val; in ltr501_write_intr_prst() local
491 new_val = DIV_ROUND_UP(period, samp_period); in ltr501_write_intr_prst()
492 if (new_val < 0 || new_val > 0x0f) in ltr501_write_intr_prst()
496 ret = regmap_field_write(data->reg_als_prst, new_val); in ltr501_write_intr_prst()
511 new_val = DIV_ROUND_UP(period, samp_period); in ltr501_write_intr_prst()
512 if (new_val < 0 || new_val > 0x0f) in ltr501_write_intr_prst()
516 ret = regmap_field_write(data->reg_ps_prst, new_val); in ltr501_write_intr_prst()
Dpa12203001.c279 int i, ret, new_val; in pa12203001_write_raw() local
289 new_val = i << PA12203001_AFSR_SHIFT; in pa12203001_write_raw()
293 new_val); in pa12203001_write_raw()
/drivers/net/ethernet/qualcomm/emac/
Demac-mac.h43 #define BITS_SET(val, lo, hi, new_val) \ argument
45 (((new_val) << (lo)) & GENMASK((hi), (lo))))
/drivers/memory/
Dstm32-fmc2-ebi.c693 u32 old_val, new_val, pcscntr; in stm32_fmc2_ebi_set_max_low_pulse() local
705 new_val = min_t(u32, setup - 1, FMC2_PCSCNTR_CSCOUNT_MAX); in stm32_fmc2_ebi_set_max_low_pulse()
707 if (old_val && new_val > old_val) in stm32_fmc2_ebi_set_max_low_pulse()
711 new_val = FIELD_PREP(FMC2_PCSCNTR_CSCOUNT, new_val); in stm32_fmc2_ebi_set_max_low_pulse()
713 FMC2_PCSCNTR_CSCOUNT, new_val); in stm32_fmc2_ebi_set_max_low_pulse()
/drivers/gpu/drm/i915/
Di915_irq.c369 u32 new_val; in ilk_update_display_irq() local
374 new_val = dev_priv->irq_mask; in ilk_update_display_irq()
375 new_val &= ~interrupt_mask; in ilk_update_display_irq()
376 new_val |= (~enabled_irq_mask & interrupt_mask); in ilk_update_display_irq()
378 if (new_val != dev_priv->irq_mask && in ilk_update_display_irq()
380 dev_priv->irq_mask = new_val; in ilk_update_display_irq()
406 u32 new_val; in bdw_update_port_irq() local
418 new_val = old_val; in bdw_update_port_irq()
419 new_val &= ~interrupt_mask; in bdw_update_port_irq()
420 new_val |= (~enabled_irq_mask & interrupt_mask); in bdw_update_port_irq()
[all …]
/drivers/w1/masters/
Domap_hdq.c81 u8 new_val = (__raw_readl(hdq_data->hdq_base + offset) & ~mask) in hdq_reg_merge() local
83 __raw_writel(new_val, hdq_data->hdq_base + offset); in hdq_reg_merge()
85 return new_val; in hdq_reg_merge()
/drivers/acpi/
Dosl.c526 acpi_string *new_val) in acpi_os_predefined_override() argument
528 if (!init_val || !new_val) in acpi_os_predefined_override()
531 *new_val = NULL; in acpi_os_predefined_override()
534 *new_val = acpi_os_name; in acpi_os_predefined_override()
539 *new_val = (char *)5; in acpi_os_predefined_override()
/drivers/media/platform/ti/davinci/
Dvpbe_venc.c89 u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask); in venc_modify() local
91 venc_write(sd, offset, new_val); in venc_modify()
93 return new_val; in venc_modify()

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