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Searched refs:nic_cfg (Results 1 – 16 of 16) sorted by relevance

/drivers/net/ethernet/aquantia/atlantic/hw_atl2/
Dhw_atl2.c247 struct aq_nic_cfg_s *nic_cfg = self->aq_nic_cfg; in hw_atl2_hw_init_tx_tc_rate_limit() local
257 fixed_max_credit = nic_cfg->aq_hw_caps->mtu / 64; in hw_atl2_hw_init_tx_tc_rate_limit()
259 fixed_max_credit_4b = nic_cfg->aq_hw_caps->mtu / 4; in hw_atl2_hw_init_tx_tc_rate_limit()
262 min_rate_msk = nic_cfg->tc_min_rate_msk & in hw_atl2_hw_init_tx_tc_rate_limit()
263 (BIT(nic_cfg->tcs) - 1); in hw_atl2_hw_init_tx_tc_rate_limit()
269 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit()
270 if (!nic_cfg->tc_min_rate[tc]) { in hw_atl2_hw_init_tx_tc_rate_limit()
276 nic_cfg->tc_min_rate[tc] * in hw_atl2_hw_init_tx_tc_rate_limit()
293 hw_atl_tps_tx_desc_rate_mode_set(self, nic_cfg->is_qos ? 1U : 0U); in hw_atl2_hw_init_tx_tc_rate_limit()
295 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit()
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/drivers/net/ethernet/aquantia/atlantic/hw_atl/
Dhw_atl_b0.c340 struct aq_nic_cfg_s *nic_cfg = self->aq_nic_cfg; in hw_atl_b0_hw_init_tx_tc_rate_limit() local
349 fixed_max_credit = nic_cfg->aq_hw_caps->mtu / 64; in hw_atl_b0_hw_init_tx_tc_rate_limit()
352 min_rate_msk = nic_cfg->tc_min_rate_msk & in hw_atl_b0_hw_init_tx_tc_rate_limit()
353 (BIT(nic_cfg->tcs) - 1); in hw_atl_b0_hw_init_tx_tc_rate_limit()
359 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl_b0_hw_init_tx_tc_rate_limit()
360 if (!nic_cfg->tc_min_rate[tc]) { in hw_atl_b0_hw_init_tx_tc_rate_limit()
366 nic_cfg->tc_min_rate[tc] * in hw_atl_b0_hw_init_tx_tc_rate_limit()
380 if (!nic_cfg->is_ptp) in hw_atl_b0_hw_init_tx_tc_rate_limit()
388 hw_atl_tps_tx_desc_rate_mode_set(self, nic_cfg->is_qos ? 1U : 0U); in hw_atl_b0_hw_init_tx_tc_rate_limit()
390 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl_b0_hw_init_tx_tc_rate_limit()
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/drivers/scsi/fnic/
Dvnic_nic.h36 static inline void vnic_set_nic_cfg(u32 *nic_cfg, in vnic_set_nic_cfg() argument
42 *nic_cfg = (rss_default_cpu & NIC_CFG_RSS_DEFAULT_CPU_MASK_FIELD) | in vnic_set_nic_cfg()
Dfnic_res.c174 u32 nic_cfg; in fnic_set_nic_config() local
177 vnic_set_nic_cfg(&nic_cfg, rss_default_cpu, in fnic_set_nic_config()
181 a0 = nic_cfg; in fnic_set_nic_config()
Dfnic.h228 struct vnic_nic_cfg *nic_cfg; member
/drivers/net/ethernet/cisco/enic/
Dvnic_nic.h40 static inline void vnic_set_nic_cfg(u32 *nic_cfg, in vnic_set_nic_cfg() argument
46 *nic_cfg = (rss_default_cpu & NIC_CFG_RSS_DEFAULT_CPU_MASK_FIELD) | in vnic_set_nic_cfg()
Denic_res.c141 u32 nic_cfg; in enic_set_nic_cfg() local
144 vnic_set_nic_cfg(&nic_cfg, rss_default_cpu, in enic_set_nic_cfg()
148 a0 = nic_cfg; in enic_set_nic_cfg()
/drivers/net/ethernet/huawei/hinic/
Dhinic_ethtool.c831 struct hinic_nic_cfg *nic_cfg; in hinic_get_pauseparam() local
834 nic_cfg = &nic_dev->hwdev->func_to_io.nic_cfg; in hinic_get_pauseparam()
839 if (nic_cfg->pause_set || !pause_info.auto_neg) { in hinic_get_pauseparam()
840 pause->rx_pause = nic_cfg->rx_pause; in hinic_get_pauseparam()
841 pause->tx_pause = nic_cfg->tx_pause; in hinic_get_pauseparam()
868 mutex_lock(&nic_dev->hwdev->func_to_io.nic_cfg.cfg_mutex); in hinic_set_pauseparam()
871 mutex_unlock(&nic_dev->hwdev->func_to_io.nic_cfg.cfg_mutex); in hinic_set_pauseparam()
874 nic_dev->hwdev->func_to_io.nic_cfg.pause_set = true; in hinic_set_pauseparam()
875 nic_dev->hwdev->func_to_io.nic_cfg.auto_neg = pause->autoneg; in hinic_set_pauseparam()
876 nic_dev->hwdev->func_to_io.nic_cfg.rx_pause = pause->rx_pause; in hinic_set_pauseparam()
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Dhinic_main.c938 struct hinic_nic_cfg *nic_cfg = &nic_dev->hwdev->func_to_io.nic_cfg; in hinic_refresh_nic_cfg() local
945 mutex_lock(&nic_cfg->cfg_mutex); in hinic_refresh_nic_cfg()
946 if (nic_cfg->pause_set || !port_cap.autoneg_state) { in hinic_refresh_nic_cfg()
947 nic_cfg->auto_neg = port_cap.autoneg_state; in hinic_refresh_nic_cfg()
948 pause_info.auto_neg = nic_cfg->auto_neg; in hinic_refresh_nic_cfg()
949 pause_info.rx_pause = nic_cfg->rx_pause; in hinic_refresh_nic_cfg()
950 pause_info.tx_pause = nic_cfg->tx_pause; in hinic_refresh_nic_cfg()
953 mutex_unlock(&nic_cfg->cfg_mutex); in hinic_refresh_nic_cfg()
Dhinic_port.c1212 struct hinic_nic_cfg *nic_cfg = &hwdev->func_to_io.nic_cfg; in hinic_dcb_set_pfc() local
1220 mutex_lock(&nic_cfg->cfg_mutex); in hinic_dcb_set_pfc()
1232 mutex_unlock(&nic_cfg->cfg_mutex); in hinic_dcb_set_pfc()
1237 nic_cfg->rx_pause = pfc_en ? 0 : 1; in hinic_dcb_set_pfc()
1238 nic_cfg->tx_pause = pfc_en ? 0 : 1; in hinic_dcb_set_pfc()
1240 mutex_unlock(&nic_cfg->cfg_mutex); in hinic_dcb_set_pfc()
Dhinic_hw_io.h91 struct hinic_nic_cfg nic_cfg; member
Dhinic_hw_dev.c971 mutex_init(&hwdev->func_to_io.nic_cfg.cfg_mutex); in hinic_init_hwdev()
/drivers/net/ethernet/cavium/thunder/
Dnic_main.c164 mbx.nic_cfg.msg = NIC_MBOX_MSG_READY; in nic_mbx_send_ready()
165 mbx.nic_cfg.vf_id = vf; in nic_mbx_send_ready()
167 mbx.nic_cfg.tns_mode = NIC_TNS_BYPASS_MODE; in nic_mbx_send_ready()
175 ether_addr_copy((u8 *)&mbx.nic_cfg.mac_addr, mac); in nic_mbx_send_ready()
177 mbx.nic_cfg.sqs_mode = (vf >= nic->num_vf_en) ? true : false; in nic_mbx_send_ready()
178 mbx.nic_cfg.node_id = nic->node; in nic_mbx_send_ready()
180 mbx.nic_cfg.loopback_supported = vf < nic->num_vf_en; in nic_mbx_send_ready()
Dnicvf_main.c220 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F; in nicvf_handle_mbx_intr()
221 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F; in nicvf_handle_mbx_intr()
222 nic->node = mbx.nic_cfg.node_id; in nicvf_handle_mbx_intr()
224 eth_hw_addr_set(nic->netdev, mbx.nic_cfg.mac_addr); in nicvf_handle_mbx_intr()
225 nic->sqs_mode = mbx.nic_cfg.sqs_mode; in nicvf_handle_mbx_intr()
226 nic->loopback_supported = mbx.nic_cfg.loopback_supported; in nicvf_handle_mbx_intr()
Dnic.h586 struct nic_cfg_msg nic_cfg; member
/drivers/net/ethernet/broadcom/
Dtg3.c9316 u32 nic_cfg; in tg3_chip_reset() local
9318 tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg); in tg3_chip_reset()
9319 if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) { in tg3_chip_reset()
9325 tg3_read_mem(tp, NIC_SRAM_DATA_CFG_3, &nic_cfg); in tg3_chip_reset()
9326 if (nic_cfg & NIC_SRAM_1G_ON_VAUX_OK) in tg3_chip_reset()
9328 if (nic_cfg & NIC_SRAM_LNK_FLAP_AVOID) in tg3_chip_reset()
15178 u32 nic_cfg, led_cfg; in tg3_get_eeprom_hw_cfg() local
15183 tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg); in tg3_get_eeprom_hw_cfg()
15184 tp->nic_sram_data_cfg = nic_cfg; in tg3_get_eeprom_hw_cfg()
15202 if ((nic_cfg & NIC_SRAM_DATA_CFG_PHY_TYPE_MASK) == in tg3_get_eeprom_hw_cfg()
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