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Searched refs:num_ref_idx_l0_default_active_minus1 (Results 1 – 13 of 13) sorted by relevance

/drivers/media/platform/mediatek/vcodec/vdec/
Dvdec_h264_req_common.h72 unsigned char num_ref_idx_l0_default_active_minus1; member
Dvdec_h264_req_common.c124 GET_MTK_VDEC_PARAM(num_ref_idx_l0_default_active_minus1); in mtk_vdec_h264_copy_pps_params()
/drivers/media/platform/allegro-dvt/
Dnal-h264.h176 unsigned int num_ref_idx_l0_default_active_minus1; member
Dnal-hevc.h274 unsigned int num_ref_idx_l0_default_active_minus1; member
Dnal-h264.c320 rbsp_uev(rbsp, &pps->num_ref_idx_l0_default_active_minus1); in nal_h264_rbsp_pps()
Dnal-hevc.c441 rbsp_uev(rbsp, &pps->num_ref_idx_l0_default_active_minus1); in nal_hevc_rbsp_pps()
Dallegro-core.c1690 pps->num_ref_idx_l0_default_active_minus1 = channel->num_ref_idx_l0 - 1; in allegro_h264_write_pps()
/drivers/media/platform/verisilicon/
Dhantro_g1_h264_dec.c104 G1_REG_DEC_CTRL6_REFIDX0_ACTIVE(pps->num_ref_idx_l0_default_active_minus1 + 1) | in set_params()
Drockchip_vpu2_hw_h264_dec.c283 VDPU_REG_REFIDX0_ACTIVE(pps->num_ref_idx_l0_default_active_minus1 + 1) | in set_params()
Dhantro_g2_hevc_dec.c294 pps->num_ref_idx_l0_default_active_minus1 + 1); in set_params()
/drivers/media/platform/nvidia/tegra-vde/
Dh264.c909 h264->num_ref_idx_l0_active_minus1 = h->pps->num_ref_idx_l0_default_active_minus1; in tegra_vde_h264_setup_context()
/drivers/staging/media/rkvdec/
Drkvdec-h264.c697 WRITE_PPS(pps->num_ref_idx_l0_default_active_minus1, in assemble_hw_pps()
/drivers/media/v4l2-core/
Dv4l2-ctrls-core.c700 if (p_h264_pps->num_ref_idx_l0_default_active_minus1 > in std_validate_compound()