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Searched refs:nv50_ior_base (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dg94.c57 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_audio_sym()
105 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_power()
124 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_links()
156 const u32 soff = nv50_ior_base(sor); in g94_sor_war_needed()
183 clksor = nvkm_rd32(device, 0x614300 + nv50_ior_base(ior)); in g94_sor_war_update_sppll1()
204 const u32 soff = nv50_ior_base(sor); in g94_sor_war_3()
245 const u32 soff = nv50_ior_base(sor); in g94_sor_war_2()
Dgt215.c71 const u32 soff = nv50_ior_base(sor); in gt215_sor_dp_audio()
104 const u32 soff = nv50_ior_base(ior); in gt215_sor_hdmi_ctrl()
Dior.h102 nv50_ior_base(struct nvkm_ior *ior) in nv50_ior_base() function
118 return nv50_ior_base(ior) + ((ior->asy.link == 2) * 0x80); in nv50_sor_link()
Dgm107.c35 const u32 soff = nv50_ior_base(sor); in gm107_sor_dp_pattern()
Dnv50.c48 const u32 poff = nv50_ior_base(pior); in nv50_pior_clock()
81 const u32 poff = nv50_ior_base(pior); in nv50_pior_power()
164 const u32 soff = nv50_ior_base(sor); in nv50_sor_clock()
182 const u32 soff = nv50_ior_base(sor); in nv50_sor_power()
244 const u32 doff = nv50_ior_base(dac); in nv50_dac_clock()
253 const u32 doff = nv50_ior_base(dac); in nv50_dac_sense()
282 const u32 doff = nv50_ior_base(dac); in nv50_dac_power()
Dga102.c35 const u32 soff = nv50_ior_base(sor); in ga102_sor_dp_links()
Dgf119.c154 const u32 soff = nv50_ior_base(sor); in gf119_sor_dp_pattern()
174 const u32 soff = nv50_ior_base(sor); in gf119_sor_dp_links()
266 const u32 soff = nv50_ior_base(sor); in gf119_sor_clock()
333 const u32 doff = nv50_ior_base(dac); in gf119_dac_clock()
Dgm200.c74 const u32 soff = nv50_ior_base(ior); in gm200_sor_hdmi_scdc()
Dtu102.c46 const u32 soff = nv50_ior_base(sor); in tu102_sor_dp_links()