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Searched refs:nvbios_rd08 (Results 1 – 25 of 44) sorted by relevance

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/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Drammap.c40 *ver = nvbios_rd08(bios, rammap + 0); in nvbios_rammapTe()
44 *hdr = nvbios_rd08(bios, rammap + 1); in nvbios_rammapTe()
45 *cnt = nvbios_rd08(bios, rammap + 5); in nvbios_rammapTe()
46 *len = nvbios_rd08(bios, rammap + 2); in nvbios_rammapTe()
47 *snr = nvbios_rd08(bios, rammap + 4); in nvbios_rammapTe()
48 *ssz = nvbios_rd08(bios, rammap + 3); in nvbios_rammapTe()
83 p->rammap_00_16_20 = (nvbios_rd08(bios, data + 0x16) & 0x20) >> 5; in nvbios_rammapEp_from_perf()
84 p->rammap_00_16_40 = (nvbios_rd08(bios, data + 0x16) & 0x40) >> 6; in nvbios_rammapEp_from_perf()
85 p->rammap_00_17_02 = (nvbios_rd08(bios, data + 0x17) & 0x02) >> 1; in nvbios_rammapEp_from_perf()
102 p->rammap_10_04_02 = (nvbios_rd08(bios, data + 0x04) & 0x02) >> 1; in nvbios_rammapEp()
[all …]
Dtiming.c43 *ver = nvbios_rd08(bios, timing + 0); in nvbios_timingTe()
46 *hdr = nvbios_rd08(bios, timing + 1); in nvbios_timingTe()
47 *cnt = nvbios_rd08(bios, timing + 2); in nvbios_timingTe()
48 *len = nvbios_rd08(bios, timing + 3); in nvbios_timingTe()
53 *hdr = nvbios_rd08(bios, timing + 1); in nvbios_timingTe()
54 *cnt = nvbios_rd08(bios, timing + 5); in nvbios_timingTe()
55 *len = nvbios_rd08(bios, timing + 2); in nvbios_timingTe()
56 *snr = nvbios_rd08(bios, timing + 4); in nvbios_timingTe()
57 *ssz = nvbios_rd08(bios, timing + 3); in nvbios_timingTe()
93 p->timing_10_WR = nvbios_rd08(bios, data + 0x00); in nvbios_timingEp()
[all …]
Dperf.c40 *ver = nvbios_rd08(bios, perf + 0); in nvbios_perf_table()
41 *hdr = nvbios_rd08(bios, perf + 1); in nvbios_perf_table()
43 *cnt = nvbios_rd08(bios, perf + 5); in nvbios_perf_table()
44 *len = nvbios_rd08(bios, perf + 2); in nvbios_perf_table()
45 *snr = nvbios_rd08(bios, perf + 4); in nvbios_perf_table()
46 *ssz = nvbios_rd08(bios, perf + 3); in nvbios_perf_table()
50 *cnt = nvbios_rd08(bios, perf + 2); in nvbios_perf_table()
51 *len = nvbios_rd08(bios, perf + 3); in nvbios_perf_table()
52 *snr = nvbios_rd08(bios, perf + 4); in nvbios_perf_table()
53 *ssz = nvbios_rd08(bios, perf + 5); in nvbios_perf_table()
[all …]
Ddp.c37 *ver = nvbios_rd08(bios, data + 0x00); in nvbios_dp_table()
45 *hdr = nvbios_rd08(bios, data + 0x01); in nvbios_dp_table()
46 *len = nvbios_rd08(bios, data + 0x02); in nvbios_dp_table()
47 *cnt = nvbios_rd08(bios, data + 0x03); in nvbios_dp_table()
70 *hdr = nvbios_rd08(bios, data + 0x04); in nvbios_dpout_entry()
71 *len = nvbios_rd08(bios, data + 0x05); in nvbios_dpout_entry()
72 *cnt = nvbios_rd08(bios, outp + 0x04); in nvbios_dpout_entry()
77 *hdr = nvbios_rd08(bios, data + 0x04); in nvbios_dpout_entry()
106 info->flags = nvbios_rd08(bios, data + 0x05); in nvbios_dpout_parse()
121 info->flags = nvbios_rd08(bios, data + 0x04); in nvbios_dpout_parse()
[all …]
Dpll.c92 *ver = nvbios_rd08(bios, data + 0); in pll_limits_table()
93 *hdr = nvbios_rd08(bios, data + 1); in pll_limits_table()
94 *len = nvbios_rd08(bios, data + 2); in pll_limits_table()
95 *cnt = nvbios_rd08(bios, data + 3); in pll_limits_table()
103 *ver = nvbios_rd08(bios, data + 0); in pll_limits_table()
154 *type = nvbios_rd08(bios, data + 0); in pll_map_reg()
195 if (nvbios_rd08(bios, data + 0) == type) { in pll_map_type()
311 info->vco1.min_n = nvbios_rd08(bios, data + 20); in nvbios_pll_parse()
312 info->vco1.max_n = nvbios_rd08(bios, data + 21); in nvbios_pll_parse()
313 info->vco1.min_m = nvbios_rd08(bios, data + 22); in nvbios_pll_parse()
[all …]
Di2c.c46 *ver = nvbios_rd08(bios, i2c + 0); in dcb_i2c_table()
47 *hdr = nvbios_rd08(bios, i2c + 1); in dcb_i2c_table()
48 *cnt = nvbios_rd08(bios, i2c + 2); in dcb_i2c_table()
49 *len = nvbios_rd08(bios, i2c + 3); in dcb_i2c_table()
88 info->type = nvbios_rd08(bios, ent + 0x03); in dcb_i2c_parse()
90 info->type = nvbios_rd08(bios, ent + 0x03) & 0x07; in dcb_i2c_parse()
102 info->drive = nvbios_rd08(bios, ent + 0); in dcb_i2c_parse()
103 info->sense = nvbios_rd08(bios, ent + 1); in dcb_i2c_parse()
106 info->drive = nvbios_rd08(bios, ent + 1); in dcb_i2c_parse()
109 info->drive = nvbios_rd08(bios, ent + 0) & 0x0f; in dcb_i2c_parse()
[all …]
Dvolt.c42 *ver = nvbios_rd08(bios, volt + 0); in nvbios_volt_table()
46 *cnt = nvbios_rd08(bios, volt + 2); in nvbios_volt_table()
47 *len = nvbios_rd08(bios, volt + 1); in nvbios_volt_table()
50 *hdr = nvbios_rd08(bios, volt + 1); in nvbios_volt_table()
51 *cnt = nvbios_rd08(bios, volt + 2); in nvbios_volt_table()
52 *len = nvbios_rd08(bios, volt + 3); in nvbios_volt_table()
57 *hdr = nvbios_rd08(bios, volt + 1); in nvbios_volt_table()
58 *cnt = nvbios_rd08(bios, volt + 3); in nvbios_volt_table()
59 *len = nvbios_rd08(bios, volt + 2); in nvbios_volt_table()
77 info->vidmask = nvbios_rd08(bios, volt + 0x04); in nvbios_volt_parse()
[all …]
Dconn.c35 *ver = nvbios_rd08(bios, data + 0); in nvbios_connTe()
36 *hdr = nvbios_rd08(bios, data + 1); in nvbios_connTe()
37 *cnt = nvbios_rd08(bios, data + 2); in nvbios_connTe()
38 *len = nvbios_rd08(bios, data + 3); in nvbios_connTe()
80 info->type = nvbios_rd08(bios, data + 0x00); in nvbios_connEp()
81 info->location = nvbios_rd08(bios, data + 0x01) & 0x0f; in nvbios_connEp()
82 info->hpd = (nvbios_rd08(bios, data + 0x01) & 0x30) >> 4; in nvbios_connEp()
83 info->dp = (nvbios_rd08(bios, data + 0x01) & 0xc0) >> 6; in nvbios_connEp()
86 info->hpd |= (nvbios_rd08(bios, data + 0x02) & 0x03) << 2; in nvbios_connEp()
87 info->dp |= nvbios_rd08(bios, data + 0x02) & 0x0c; in nvbios_connEp()
[all …]
Dinit.c468 return nvbios_rd08(bios, data + offset); in init_xlat_()
501 u8 index = nvbios_rd08(bios, table + (cond * 5) + 2); in init_io_condition_met()
502 u8 mask = nvbios_rd08(bios, table + (cond * 5) + 3); in init_io_condition_met()
503 u8 value = nvbios_rd08(bios, table + (cond * 5) + 4); in init_io_condition_met()
518 u8 index = nvbios_rd08(bios, table + (cond * 9) + 2); in init_io_flag_condition_met()
519 u8 mask = nvbios_rd08(bios, table + (cond * 9) + 3); in init_io_flag_condition_met()
520 u8 shift = nvbios_rd08(bios, table + (cond * 9) + 4); in init_io_flag_condition_met()
522 u8 dmask = nvbios_rd08(bios, table + (cond * 9) + 7); in init_io_flag_condition_met()
523 u8 value = nvbios_rd08(bios, table + (cond * 9) + 8); in init_io_flag_condition_met()
525 return (nvbios_rd08(bios, data + ioval) & dmask) == value; in init_io_flag_condition_met()
[all …]
Dxpio.c35 *ver = nvbios_rd08(bios, data + 0x00); in dcb_xpiod_table()
36 *hdr = nvbios_rd08(bios, data + 0x01); in dcb_xpiod_table()
37 *cnt = nvbios_rd08(bios, data + 0x02); in dcb_xpiod_table()
38 *len = nvbios_rd08(bios, data + 0x03); in dcb_xpiod_table()
53 *ver = nvbios_rd08(bios, data + 0x00); in dcb_xpio_table()
54 *hdr = nvbios_rd08(bios, data + 0x01); in dcb_xpio_table()
55 *cnt = nvbios_rd08(bios, data + 0x02); in dcb_xpio_table()
56 *len = nvbios_rd08(bios, data + 0x03); in dcb_xpio_table()
69 info->type = nvbios_rd08(bios, data + 0x04); in dcb_xpio_parse()
70 info->addr = nvbios_rd08(bios, data + 0x05); in dcb_xpio_parse()
[all …]
Dvpstate.c51 h->version = nvbios_rd08(b, h->offset); in nvbios_vpstate_parse()
54 h->hlen = nvbios_rd08(b, h->offset + 0x1); in nvbios_vpstate_parse()
55 h->elen = nvbios_rd08(b, h->offset + 0x2); in nvbios_vpstate_parse()
56 h->slen = nvbios_rd08(b, h->offset + 0x3); in nvbios_vpstate_parse()
57 h->scount = nvbios_rd08(b, h->offset + 0x4); in nvbios_vpstate_parse()
58 h->ecount = nvbios_rd08(b, h->offset + 0x5); in nvbios_vpstate_parse()
60 h->base_id = nvbios_rd08(b, h->offset + 0x0f); in nvbios_vpstate_parse()
62 h->boost_id = nvbios_rd08(b, h->offset + 0x10); in nvbios_vpstate_parse()
66 h->tdp_id = nvbios_rd08(b, h->offset + 0x11); in nvbios_vpstate_parse()
85 e->pstate = nvbios_rd08(b, offset); in nvbios_vpstate_entry()
Diccsense.c44 *ver = nvbios_rd08(bios, iccsense + 0); in nvbios_iccsense_table()
48 *hdr = nvbios_rd08(bios, iccsense + 1); in nvbios_iccsense_table()
49 *len = nvbios_rd08(bios, iccsense + 2); in nvbios_iccsense_table()
50 *cnt = nvbios_rd08(bios, iccsense + 3); in nvbios_iccsense_table()
91 if ((nvbios_rd08(bios, entry + 0x1) & 0xf8) == 0xf8) in nvbios_iccsense_parse()
95 rail->extdev_id = nvbios_rd08(bios, entry + 0x2); in nvbios_iccsense_parse()
99 rail->mode = nvbios_rd08(bios, entry); in nvbios_iccsense_parse()
100 rail->extdev_id = nvbios_rd08(bios, entry + 0x1); in nvbios_iccsense_parse()
122 rail->resistors[r].mohm = nvbios_rd08(bios, entry + res_start + r * 2); in nvbios_iccsense_parse()
123 rail->resistors[r].enabled = !(nvbios_rd08(bios, entry + res_start + r * 2 + 1) & 0x40); in nvbios_iccsense_parse()
DM0209.c39 *ver = nvbios_rd08(bios, data + 0x00); in nvbios_M0209Te()
42 *hdr = nvbios_rd08(bios, data + 0x01); in nvbios_M0209Te()
43 *len = nvbios_rd08(bios, data + 0x02); in nvbios_M0209Te()
44 *ssz = nvbios_rd08(bios, data + 0x03); in nvbios_M0209Te()
46 *cnt = nvbios_rd08(bios, data + 0x04); in nvbios_M0209Te()
81 info->v00_40 = (nvbios_rd08(bios, data + 0x00) & 0x40) >> 6; in nvbios_M0209Ep()
82 info->bits = nvbios_rd08(bios, data + 0x00) & 0x3f; in nvbios_M0209Ep()
83 info->modulo = nvbios_rd08(bios, data + 0x01); in nvbios_M0209Ep()
84 info->v02_40 = (nvbios_rd08(bios, data + 0x02) & 0x40) >> 6; in nvbios_M0209Ep()
85 info->v02_07 = nvbios_rd08(bios, data + 0x02) & 0x07; in nvbios_M0209Ep()
[all …]
Dcstep.c40 *ver = nvbios_rd08(bios, cstep + 0); in nvbios_cstepTe()
43 *hdr = nvbios_rd08(bios, cstep + 1); in nvbios_cstepTe()
44 *cnt = nvbios_rd08(bios, cstep + 3); in nvbios_cstepTe()
45 *len = nvbios_rd08(bios, cstep + 2); in nvbios_cstepTe()
46 *xnr = nvbios_rd08(bios, cstep + 5); in nvbios_cstepTe()
47 *xsz = nvbios_rd08(bios, cstep + 4); in nvbios_cstepTe()
79 info->index = nvbios_rd08(bios, data + 0x03); in nvbios_cstepEp()
117 info->unkn[0] = nvbios_rd08(bios, data + 0x02); in nvbios_cstepXp()
118 info->unkn[1] = nvbios_rd08(bios, data + 0x03); in nvbios_cstepXp()
119 info->voltage = nvbios_rd08(bios, data + 0x04); in nvbios_cstepXp()
Dvmap.c38 *ver = nvbios_rd08(bios, vmap + 0); in nvbios_vmap_table()
42 *hdr = nvbios_rd08(bios, vmap + 1); in nvbios_vmap_table()
43 *cnt = nvbios_rd08(bios, vmap + 3); in nvbios_vmap_table()
44 *len = nvbios_rd08(bios, vmap + 2); in nvbios_vmap_table()
69 info->max0 = nvbios_rd08(bios, vmap + 0x7); in nvbios_vmap_parse()
70 info->max1 = nvbios_rd08(bios, vmap + 0x8); in nvbios_vmap_parse()
72 info->max2 = nvbios_rd08(bios, vmap + 0xc); in nvbios_vmap_parse()
108 info->mode = nvbios_rd08(bios, vmap + 0x00); in nvbios_vmap_entry_parse()
109 info->link = nvbios_rd08(bios, vmap + 0x01); in nvbios_vmap_entry_parse()
Dtherm.c49 *ver = nvbios_rd08(bios, therm + 0); in therm_table()
50 *hdr = nvbios_rd08(bios, therm + 1); in therm_table()
51 *len = nvbios_rd08(bios, therm + 2); in therm_table()
52 *cnt = nvbios_rd08(bios, therm + 3); in therm_table()
53 return therm + nvbios_rd08(bios, therm + 1); in therm_table()
86 switch (nvbios_rd08(bios, entry + 0)) { in nvbios_therm_sensor_parse()
95 offset = ((s8) nvbios_rd08(bios, entry + 2)) / 2; in nvbios_therm_sensor_parse()
168 switch (nvbios_rd08(bios, entry + 0)) { in nvbios_therm_fan_parse()
199 fan->linear_min_temp = nvbios_rd08(bios, entry + 1); in nvbios_therm_fan_parse()
200 fan->linear_max_temp = nvbios_rd08(bios, entry + 2); in nvbios_therm_fan_parse()
Dbase.c50 nvbios_rd08(struct nvkm_bios *bios, u32 addr) in nvbios_rd08() function
104 c1 = nvbios_rd08(bios, addr++); in nvbios_memcmp()
188 bios->version.major = nvbios_rd08(bios, bit_i.offset + 3); in nvkm_bios_new()
189 bios->version.chip = nvbios_rd08(bios, bit_i.offset + 2); in nvkm_bios_new()
190 bios->version.minor = nvbios_rd08(bios, bit_i.offset + 1); in nvkm_bios_new()
191 bios->version.micro = nvbios_rd08(bios, bit_i.offset + 0); in nvkm_bios_new()
192 bios->version.patch = nvbios_rd08(bios, bit_i.offset + 4); in nvkm_bios_new()
195 bios->version.major = nvbios_rd08(bios, bios->bmp_offset + 13); in nvkm_bios_new()
196 bios->version.chip = nvbios_rd08(bios, bios->bmp_offset + 12); in nvkm_bios_new()
197 bios->version.minor = nvbios_rd08(bios, bios->bmp_offset + 11); in nvkm_bios_new()
[all …]
Dmxm.c83 ver = nvbios_rd08(bios, map); in mxm_sor_map()
85 if (conn < nvbios_rd08(bios, map + 3)) { in mxm_sor_map()
86 map += nvbios_rd08(bios, map + 1); in mxm_sor_map()
88 return nvbios_rd08(bios, map); in mxm_sor_map()
120 ver = nvbios_rd08(bios, map); in mxm_ddc_map()
122 if (port < nvbios_rd08(bios, map + 3)) { in mxm_ddc_map()
123 map += nvbios_rd08(bios, map + 1); in mxm_ddc_map()
125 return nvbios_rd08(bios, map); in mxm_ddc_map()
Dextdev.c42 *ver = nvbios_rd08(bios, extdev + 0); in extdev_table()
43 *hdr = nvbios_rd08(bios, extdev + 1); in extdev_table()
44 *cnt = nvbios_rd08(bios, extdev + 2); in extdev_table()
45 *len = nvbios_rd08(bios, extdev + 3); in extdev_table()
55 u8 flags = nvbios_rd08(bios, data - hdr + 4); in nvbios_extdev_skip_probe()
76 entry->type = nvbios_rd08(bios, offset + 0); in extdev_parse_entry()
77 entry->addr = nvbios_rd08(bios, offset + 1); in extdev_parse_entry()
78 entry->bus = (nvbios_rd08(bios, offset + 2) >> 4) & 1; in extdev_parse_entry()
Dgpio.c38 if (*ver >= 0x22 && nvbios_rd08(bios, dcb - 1) >= 0x13) in dcb_gpio_table()
42 *ver = nvbios_rd08(bios, data + 0x00); in dcb_gpio_table()
45 *cnt = nvbios_rd08(bios, data + 0x02); in dcb_gpio_table()
46 *len = nvbios_rd08(bios, data + 0x01); in dcb_gpio_table()
49 *hdr = nvbios_rd08(bios, data + 0x01); in dcb_gpio_table()
50 *cnt = nvbios_rd08(bios, data + 0x02); in dcb_gpio_table()
51 *len = nvbios_rd08(bios, data + 0x03); in dcb_gpio_table()
134 u8 conf = nvbios_rd08(bios, data - 5); in dcb_gpio_match()
135 u8 addr = nvbios_rd08(bios, data - 4); in dcb_gpio_match()
Dfan.c39 *ver = nvbios_rd08(bios, fan + 0); in nvbios_fan_table()
42 *hdr = nvbios_rd08(bios, fan + 1); in nvbios_fan_table()
43 *len = nvbios_rd08(bios, fan + 2); in nvbios_fan_table()
44 *cnt = nvbios_rd08(bios, fan + 3); in nvbios_fan_table()
72 u8 type = nvbios_rd08(bios, data + 0x00); in nvbios_fan_parse()
87 fan->min_duty = nvbios_rd08(bios, data + 0x02); in nvbios_fan_parse()
88 fan->max_duty = nvbios_rd08(bios, data + 0x03); in nvbios_fan_parse()
DM0203.c38 *ver = nvbios_rd08(bios, data + 0x00); in nvbios_M0203Te()
41 *hdr = nvbios_rd08(bios, data + 0x01); in nvbios_M0203Te()
42 *len = nvbios_rd08(bios, data + 0x02); in nvbios_M0203Te()
43 *cnt = nvbios_rd08(bios, data + 0x03); in nvbios_M0203Te()
62 info->type = nvbios_rd08(bios, data + 0x04); in nvbios_M0203Tp()
92 info->type = (nvbios_rd08(bios, data + 0x00) & 0x0f) >> 0; in nvbios_M0203Ep()
93 info->strap = (nvbios_rd08(bios, data + 0x00) & 0xf0) >> 4; in nvbios_M0203Ep()
94 info->group = (nvbios_rd08(bios, data + 0x01) & 0x0f) >> 0; in nvbios_M0203Ep()
DM0205.c39 *ver = nvbios_rd08(bios, data + 0x00); in nvbios_M0205Te()
42 *hdr = nvbios_rd08(bios, data + 0x01); in nvbios_M0205Te()
43 *len = nvbios_rd08(bios, data + 0x02); in nvbios_M0205Te()
44 *ssz = nvbios_rd08(bios, data + 0x03); in nvbios_M0205Te()
45 *snr = nvbios_rd08(bios, data + 0x04); in nvbios_M0205Te()
46 *cnt = nvbios_rd08(bios, data + 0x05); in nvbios_M0205Te()
99 info->type = nvbios_rd08(bios, data + 0x00) & 0x0f; in nvbios_M0205Ep()
129 info->data = nvbios_rd08(bios, data + 0x00); in nvbios_M0205Sp()
Dpcir.c38 *ver = nvbios_rd08(bios, data + 0x0c); in nvbios_pcirTe()
60 info->class_code[0] = nvbios_rd08(bios, data + 0x0d); in nvbios_pcirTp()
61 info->class_code[1] = nvbios_rd08(bios, data + 0x0e); in nvbios_pcirTp()
62 info->class_code[2] = nvbios_rd08(bios, data + 0x0f); in nvbios_pcirTp()
65 info->image_type = nvbios_rd08(bios, data + 0x14); in nvbios_pcirTp()
66 info->last = nvbios_rd08(bios, data + 0x15) & 0x80; in nvbios_pcirTp()
Dboost.c40 *ver = nvbios_rd08(bios, boost + 0); in nvbios_boostTe()
43 *hdr = nvbios_rd08(bios, boost + 1); in nvbios_boostTe()
44 *cnt = nvbios_rd08(bios, boost + 5); in nvbios_boostTe()
45 *len = nvbios_rd08(bios, boost + 2); in nvbios_boostTe()
46 *snr = nvbios_rd08(bios, boost + 4); in nvbios_boostTe()
47 *ssz = nvbios_rd08(bios, boost + 3); in nvbios_boostTe()
120 info->domain = nvbios_rd08(bios, data + 0x00); in nvbios_boostSp()
121 info->percent = nvbios_rd08(bios, data + 0x01); in nvbios_boostSp()

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